Repository for Publications and Research Data

Search ETH Zurich’s Research Collection for scientific publications and research data or submit your own research output. Read more


Short service interruption on Thursday, 21 March, 12.00

On Thursday, 21 March, 12.00 – 13.00, there will be a short service interruption in the Research Collection. During this time, you won’t be able to upload new documents or edit existing records. The login will be deactivated during this time. Reason: maintenance work

Data Management Plans for the SNSF

Applications submitted to the Swiss National Science Foundation (SNSF) must include a Data Management Plan (DMP). The DMP is created online in mySNF and is considered as a draft at this stage. Read more

Webinar: How to go Open Access

On Monday, 25 March a public and free webinar will take place from 11.00 to 12.00 about Open Access. Read more

Recently Added 

  1. Konzeptionelle Standortanalyse von Fischleitrechen mit Hilfe numerischer 3-D-Simulation 

    Feigenwinter, Linus; Vetsch, David Florian; Kammerer, Stephan; et al. (2018)
    Wasser Energie Luft
    Journal Article
  2. Thermal properties of disordered LixMoS2: An ab initio study 

    Bunjaku, Teutë; Luisier, Mathieu (2019)
    Physical Review Materials
    Journal Article
  3. Magnetic properties and domain structure of ultrathin yttrium iron garnet/Pt bilayers 

    Mendil, Johannes; Trassin, Morgan; Bu, Q.; et al. (2019)
    Physical Review Materials
    Journal Article
  4. 21 

    Jeong, S.; Chen, Y.; Jang, T.; et al. (2017)
    2017 IEEE International Solid-State Circuits Conference (ISSCC)
    IoT devices are becoming increasingly intelligent and context-aware. Sound is an attractive sensory modality because it is information-rich but not as computationally demanding as alternatives such as vision. New applications of ultra-low power (ULP), `always-on' intelligent acoustic sensing includes agricultural monitoring to detect pests or precipitation, infrastructure health tracking to recognize acoustic symptoms, and security/safety ...
    Conference Paper
  5. A 0 

    Liu, J.; Jeon, S.; Jang, T.; et al. (2011)
    IEEE Asian Solid-State Circuits Conference 2011
    A low-voltage operation, small-die-area, fully integrated Phase-Locked Loop (PLL) as a clock generator is described in an advanced 32nm CMOS technology. The PLL employs a fully digital, 6-bit automatic frequency calibrator (AFC), and varactors for frequency fine-tuning. To improve the performance and lower down the cost in mobile SoC applications, the PLL is capable of operating at a supply voltage of 0.8V over production test with only ...
    Conference Paper

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