Journal: IEEE Transactions on Circuits and Systems I: Regular Papers

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IEEE

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1549-8328
1057-7122
1558-0806

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Publications 1 - 10 of 67
  • Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks
    Item type: Journal Article
    Cerutti, Gianmarco; Cavigelli, Lukas Arno Jakob; Andri, Renzo; et al. (2022)
    IEEE Transactions on Circuits and Systems I: Regular Papers
    Keyword spotting (KWS) is a crucial function enabling the interaction with the many ubiquitous smart devices in our surroundings, either activating them through wake-word or directly as a human-computer interface. For many applications, KWS is the entry point for our interactions with the device and, thus, an always-on workload. Many smart devices are mobile and their battery lifetime is heavily impacted by continuously running services. KWS and similar always-on services are thus the focus when optimizing the overall power consumption. This work addresses KWS energy-efficiency on low-cost microcontroller units (MCUs). We combine analog binary feature extraction with binary neural networks. By replacing the digital preprocessing with the proposed analog front-end, we show that the energy required for data acquisition and preprocessing can be reduced by 29x, cutting its share from a dominating 85% to a mere 16% of the overall energy consumption for our reference KWS application. Experimental evaluations on the Speech Commands Dataset show that the proposed system outperforms state-of-the-art accuracy and energy efficiency, respectively, by 1% and 4.3x on a 10-class dataset while providing a compelling accuracy-energy trade-off including a 2% accuracy drop for a 71x energy reduction.
  • A Time-Based Bandpass ADC Using Time-Interleaved Voltage-Controlled Oscillators
    Item type: Journal Article
    Yoon, Young-Gyu; Kim, Jaewook; Jang, Taekwang; et al. (2008)
    IEEE Transactions on Circuits and Systems I: Regular Papers
  • Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter
    Item type: Journal Article
    Kim, Jaewook; Jang, Taekwang; Yoon, Young-Gyu; et al. (2010)
    IEEE Transactions on Circuits and Systems I: Regular Papers
  • Design of QPP Interleavers for the Parallel Turbo Decoding Architecture
    Item type: Journal Article
    Wang, Jian; Zhang, Kangli; Kröll, Harald; et al. (2016)
    IEEE Transactions on Circuits and Systems I: Regular Papers
  • A Reconfigurable 5-to-14 bit SAR ADC for Battery-Powered Medical Instrumentation
    Item type: Journal Article
    Fateh, Schekeb; Schonle, Philipp; Bettini, Luca; et al. (2015)
    IEEE Transactions on Circuits and Systems I: Regular Papers
  • Non-Uniform Wavelet Sampling for RF Analog-to-Information Conversion
    Item type: Journal Article
    Pelissier, Michaël; Studer, Christoph (2018)
    IEEE Transactions on Circuits and Systems I: Regular Papers
    Feature extraction, such as spectral occupancy, interferer energy and type, or direction-of-arrival, from wideband radio-frequency (RF) signals finds use in a growing number of applications as it enhances RF transceivers with cognitive abilities and enables parameter tuning of traditional RF chains. In power and cost limited applications, e.g., for sensor nodes in the Internet of Things, wideband RF feature extraction with conventional, Nyquist-rate analog-to-digital converters is infeasible. However, the structure of many RF features (such as signal sparsity) enables the use of compressive sensing (CS) techniques that acquire such signals at sub-Nyquist rates; while such CS-based analog-to-information (A2I) converters have the potential to enable low-cost and energy-efficient wideband RF sensing, they suffer from a variety of real-world limitations, such as noise folding, low sensitivity, aliasing, and limited flexibility. This paper proposes a novel CS-based A2I architecture called non-uniform wavelet sampling. Our solution extracts a carefully-selected subset of wavelet coefficients directly in the RF domain, which mitigates the main issues of existing A2I converter architectures. For multi-band RF signals, we propose a specialized variant called non-uniform wavelet bandpass sampling (NUWBS), which further improves sensitivity and reduces hardware complexity by leveraging the multi-band signal structure. We use simulations to demonstrate that NUWBS approaches the theoretical performance limits of l1 -norm-based sparse signal recovery. We investigate hardware-design aspects and show ASIC measurement results for the wavelet generation stage, which highlight the efficacy of NUWBS for a broad range of RF feature extraction tasks in cost- and power-limited applications.
  • A Two-Dimensional Configurable Active Silicon Dendritic Neuron Array
    Item type: Journal Article
    Wang, Yingxue; Liu, Shih-Chii (2011)
    IEEE Transactions on Circuits and Systems I: Regular Papers
  • Efficient Soft-Output Gauss-Seidel Data Detector for Massive MIMO Systems
    Item type: Journal Article
    Zhang, Chuan; Wu, Zhizhen; Studer, Christoph; et al. (2018)
    IEEE Transactions on Circuits and Systems I: Regular Papers
    For massive multiple-input multiple-output (MIMO) systems, linear minimum mean-square error (MMSE) detection has been shown to achieve near-optimal performance but suffers from excessively high complexity due to the large-scale matrix inversion. Being matrix inversion free, detection algorithms based on the Gauss–Seidel (GS) method have been proved more efficient than conventional Neumann series expansion-based ones. In this paper, an efficient GS-based soft-output data detector for massive MIMO and a corresponding VLSI architecture are proposed. To accelerate the convergence of the GS method, a new initial solution is proposed. Several optimizations on the VLSI architecture level are proposed to further reduce the processing latency and area. Our reference implementation results on a Xilinx Virtex-7 XC7VX690T FPGA for a 128 base-station antenna and eight user massive MIMO system show that our GS-based data detector achieves a throughput of 732 Mb/s with close-to-MMSE error-rate performance. Our implementation results demonstrate that the proposed solution has advantages over the existing designs in terms of complexity and efficiency, especially under challenging propagation conditions.
  • Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing
    Item type: Journal Article
    Sinigaglia, Mattia; Kiamarzi, Amirhossein; Bertuletti, Marco; et al. (2025)
    IEEE Transactions on Circuits and Systems I: Regular Papers
    Most Wearable Ultrasound (WUS) devices lack the computational power to process signals at the edge, instead relying on remote offload, which introduces latency, high power consumption, and privacy concerns. We present Maestro, a RISC-V SoC with unified Vector-Tensor Unit (VTU) and memory-coupled Fast Fourier Transform (FFT) accelerators targeting edge processing for wearable ultrasound devices, fabricated using low-cost TSMC 65nm CMOS technology. The VTU achieves peak 302GFLOPS/W and 19.8GFLOPS at FP16, while the multi-precision 16/32-bit floating-point FFT accelerator delivers peak 60.6GFLOPS/W and 3.6GFLOPS at FP16. We evaluate Maestro on a US-based gesture recognition task, achieving 1.62GFLOPS in signal processing at 26.68GFLOPS/W, and 19.52GFLOPS in Convolutional Neural Network (CNN) workloads at 298.03GFLOPS/W. Compared to a state-of-the-art SoC with a similar mission profile, Maestro achieves a 5x speedup while consuming only 12mW, with an energy consumption of 2.5mJ in a wearable US channel preprocessing and ML-based postprocessing pipeline.
  • A low-power architecture for punctured compressed sensing and estimation in wireless sensor-nodes
    Item type: Journal Article
    Bellasi, David E.; Rovatti, Riccardo; Benini, Luca; et al. (2015)
    IEEE Transactions on Circuits and Systems I: Regular Papers
Publications 1 - 10 of 67