Journal: Analog Integrated Circuits and Signal Processing

Abbreviation

Analog integr. circuits signal process.

Publisher

Springer

Journal Volumes

ISSN

0925-1030
1573-1979

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Publications 1 - 7 of 7
  • Bias Current Generators with Wide Dynamic Range
    Item type: Conference Paper
    Delbrück, Tobias; van Schaik, André (2005)
    Analog Integrated Circuits and Signal Processing
  • A smart single-chip micro-hotplate-based gas sensor system in CMOS-technology
    Item type: Journal Article
    Barrettino, Diego; Graf, Markus; Zimmermann, Martin; et al. (2004)
    Analog Integrated Circuits and Signal Processing
  • Design and analysis of high-gain amplifiers in flexible self-aligned a-IGZO thin-film transistor technology
    Item type: Journal Article
    Shabanpour, Reza; Meister, Tilo; Ishida, Koich; et al. (2016)
    Analog Integrated Circuits and Signal Processing
  • A behavioural model of resonant cantilevers for chemical sensing
    Item type: Journal Article
    Paci, D.; Kirstein, K.-U.; Vancura, C.; et al. (2005)
    Analog Integrated Circuits and Signal Processing
  • Guest Editorial
    Item type: Other Journal Item
    Tarim, Tuna B.; Schmid, Hanspeter; Harjani, Ramesh (2005)
    Analog Integrated Circuits and Signal Processing
  • An active charge balancing method suitable for integration in the output-stage of electrical neural stimulators
    Item type: Journal Article
    Ranjandish, Reza; Jang, Taekwang; Schmid, Alexandre (2022)
    Analog Integrated Circuits and Signal Processing
    This paper presents a charge controlling circuit technique to integrate a charge balancer circuitry in the output-stage of electrical neural stimulators with the aim to reduce the area and the power consumption of the charge balancing circuitry. The proposed architecture is an inter-pulse charge control technique that senses the electrode voltage and provides stable charge balancing throughout the entire stimulation parameters. To ensure the stability, only one side of the output stage is active during the charge balancing phase. The stimulator employed in the proposed system has an adaptive quad-rail compliance as high as 45 V, configurable from 5 to 45 V, according to the requirement of the application. Thanks to a straightforward structure of the proposed charge control circuit, the proposed charge balancer (CB) performs with low power consumption (from 3.5 to 14.8 μW), occupies small silicon area (0.102 mm²), and has a high dynamic-range of power supply compliance in comparison to similar existing consequence-based charge control blocks as well as performs charge balancing for a wider range of tissue impedance. According to its reported characteristics, the proposed method leads to an improvement in stability, power consumption, area and power supply compliance as well as tissue impedance range compared to the state-of-the-art charge balancing methods.
  • A low-power transmission-gate-based 16-bit multiplier for digital hearing aids
    Item type: Conference Paper
    Carbognani, Flavio; Buergin, Felix; Felber, Norbert; et al. (2008)
    Analog Integrated Circuits and Signal Processing
Publications 1 - 7 of 7