Electronics

Journal: Electronics

Abbreviation

Electronics (1930)

Publisher

MDPI

ISSN

2079-9292

Show all metadata

Search Results

Publications 1 - 10 of 12

All’s Well That FID’s Well? Result Quality and Metric Scores in GAN Models for Lip-Synchronization Tasks
Geldhauser, Carina; Liljegren, Johan; Nordqvist, Pontus (2025)
Electronics
This exploratory study investigates the usability of performance metrics for generative adversarial network (GAN)-based models for speech-driven facial animation. These models focus on the transfer of speech information from an audio file to a still image to generate talking-head videos in a small-scale “everyday usage” setting. Two models, LipGAN and a custom implementation of a Wasserstein GAN with gradient penalty (L1WGAN-GP), are examined for their visual performance and scoring according to commonly used metrics: Quantitative comparisons using FID, SSIM, and PSNR metrics on the GRIDTest dataset show mixed results, and metrics fail to capture local artifacts crucial for lip synchronization, pointing to limitations in their applicability for video animation tasks. The study points towards the inadequacy of current quantitative measures and emphasizes the continued necessity of human qualitative assessment for evaluating talking-head video quality.
New EV Battery Charger PFC Rectifier Front-End Allowing Full Power Delivery in 3-Phase and 1-Phase Operation
Papamanolis, Panteleimon; Bortis, Dominik; Krismer, Florian; et al. (2021)
Electronics
A new universal front-end PFC rectifier topology of a battery charger for Electric Vehicles (EVs) is proposed, which allows fast charging at rated and/or full power level in case of 3-phase (Europe) as well as 1-phase (USA) mains supply. In this regard, a conventional 3-phase PFC rectifier would facilitate only one-third of the rated power in case of 1-phase operation. The new topology is based on a two-level six-switch (2LB6) 3-phase boost-type PFC rectifier, which is extended with a diode bridge-leg and additional windings of the Common-Mode (CM) chokes of the EMI filter. Besides this extension of the power circuit, the general design of the new converter is explained, and the generated Differential Mode (DM) and Common Mode (CM) EMI disturbances are investigated for 3-phase and 1-phase operation, resulting in guidelines for the EMI filter design. The EMI performance (CISPR 11 class-B QP) is experimentally verified for 1-phase and 3-phase operation at an output power of 4.5 kW, using a full-scale hardware prototype that implements the proposed extensions for a 2LB6 3-phase boost-type PFC rectifier and that is designed for output power levels of 22 kW and 19 kW in case of 3-phase and 1-phase operation, respectively. Compared to a conventional 2LB6 PFC rectifier, the volume of the extended system increases from 2.7 dm3 to 3.4 dm3, of which 0.5 dm3 is due to the additional dc-link capacitance for buffering the power pulsation with twice the mains frequency occurring for 1-phase operation.
Conceptualization and Analysis of a Next-Generation Ultra-Compact 1.5-kW PCB-Integrated Wide-Input-Voltage-Range 12V-Output Industrial DC/DC Converter Module
Knabben, Gustavo C.; Zulauf, Grayson; Schäfer, Jannik; et al. (2021)
Electronics
The next-generation industrial environment requires power supplies that are compact, efficient, low-cost, and ultra-reliable, even across mains failures, to power mission-critical electrified processes. Hold-up time requirements and the demand for ultra-high power density and minimum production costs, in particular, drive the need for power converters with (i) a wide input voltage range, to reduce the size of the hold-up capacitor, (ii) soft-switching over the full input voltage and load ranges, to achieve low losses that facilitate a compact realization, and (iii) complete PCB-integration for low-cost manufacturing. In this work, we conceptualize, design, model, fabricate, and characterize a 1.5 kW, 12 V-output DC/DC converter for industrial power supplies that is required to operate across a wide 300 V–430 V input voltage range. This module utilizes an LLC-based control scheme for complete soft-switching and a snake-core transformer to divide the output current with a balanced flux among multiple secondary windings. Detailed loss models are derived for every component in the converter. The converter achieves close to 96% peak efficiency with a power density of 337 W in−3 (20.6 kW/dm−3), excellent matching to the derived loss models, and zero-voltage switching even down to zero load. The loss models are used to identify improvements to further boost efficiency, the most important of which is the minimization of delay times in synchronous rectification, and a subsequent improved 1.5 kW hardware module eliminates nearly 25% of converter losses for a peak efficiency of nearly 97% with a power density of 308 W in−3 (18.8 kW dm−3). Two 1.5 kW modules are then paralleled to achieve 3 kW output power at 12 V and 345 W in−3 (21.1 kW dm−3) with ideal current sharing between the secondary outputs and no drop in efficiency from a single module, an important characteristic enabled by the novel snake-core transformer.
Novel Motor-Kinetic-Energy-Based Power Pulsation Buffer Concept for Single-Phase-Input Electrolytic-Capacitor-Less Motor-Integrated Inverter System
Haider, Michael; Bortis, Dominik; Zulauf, Grayson; et al. (2022)
Electronics
The motor integration of singe-phase-supplied Variable-Speed Drives (VSDs) is prevented by the significant volume, short lifetime, and operating temperature limit of the electrolytic capacitors required to buffer the pulsating power grid. The DC-link energy storage requirement is eliminated by using the kinetic energy of the motor as a buffer. The proposed concept is called the Motor-Integrated Power Pulsation Buffer (MPPB), and a control technique and structure are detailed that meet the requirements for nominal and faulted operation with a simple reconfiguration of existing controller blocks. A 7.5 kW, motor-integrated hardware demonstrator validated the proposed MPPB concept and loss models for a scroll compressor drive used in auxiliary railway applications. The MPPB drive with a front-end CISPR 11/Class A EMI filter, PFC rectifier stage, and output-side inverter stage achieved a power density of 0.91 kW L−1 (15 W in−3). The grid-to-motor-shaft efficiency exceeded 90% for all loads over 5 kW or 66% of nominal load, with a worst-case loss penalty over a conventional system of only 17%.
Comparative Evaluation of Three-Phase Three-Level Flying Capacitor and Stacked Polyphase Bridge GaN Inverter Systems for Integrated Motor Drives
Rohner, Gwendolin; Huber, Jonas; Miric, Spasoje; et al. (2024)
Electronics
This article presents a comprehensive comparative evaluation of a three-phase Three-Level (3L) Flying Capacitor Converter (FCC) and a Stacked Polyphase Bridge Inverter (SPBI), specifically a converter system formed by two Series-Stacked Two-Level three-phase Converters (2L-SSC), for the realization of a 7.5 kW Integrated Motor Drive (IMD) with a high short-term overload capability. The 2L-SSC requires a motor with two three-phase windings and a split DC-link, but uses standard six-switch, two-level transistor configurations. In contrast, the bridge legs of the 3L-FCC feature flying capacitors whose voltages must be actively balanced. Despite the 800 V DC-link voltage, both topologies employ the same set of 650 V GaN power transistors, i.e., the same total chip area, and if operated at the same switching frequency, show identical semiconductor losses. Electric Discharge Machining (EDM) damage of the motor bearings is a relevant issue caused by the common-mode (CM) voltages of the inverter stage. The high effective switching frequency of the 3L-FCC and the possibility of CM voltage canceling in the 2L-SSC facilitate mitigation of EDM by means of CM chokes, whereby a substantially smaller CM choke with lower losses suffices for the 2L-SSC; based on exemplary designs, the 2L-SSC features only about 75% of the total volume and 85% of the nominal losses of the 3L-FCC. If, alternatively, motor-friendliness is maximized by including DC-referenced sine-wave output filters, the 3L-FCC’s higher effective switching frequency and the 2L-SSC’s need for two sets of filters due to the dual-winding-set motor change the outcome. In this case, the 3L-FCC features only about 60% of the volume and only about 55% of the 2L-SSC’s nominal losses.
A Simplified Hard-Switching Loss Model for Fast-Switching Three-Level T-Type SiC Bridge-Legs
Cittanti, Davide; Gammeter, Cristoph; Huber, Jonas; et al. (2022)
Electronics
Hard-switching losses in three-level T-type (3LTT) bridge-legs cannot be directly estimated from datasheet energy loss curves, which are given for symmetric two-level half-bridge configurations only. The commutations in a 3LTT bridge-leg occur between semiconductors with different blocking voltages and/or current ratings, and involve a third semiconductor device in the switching transition, which contributes additional capacitive losses. This paper, therefore, describes a simplifed approach to estimate a lower bound for the hard-switching losses of 3LTT bridge-legs (note that the approach is applicable to other three-level topolgies as well). In view of the very fast switching speeds of wide-bandgap semiconductors, the model neglects voltage/current overlap losses and considers only the dominating charge-related loss contributions (semiconductor output capacitances, body diode reverse-recovery charge), thus requiring minimal information from datasheets. A direct experimental verification with an 800 V DC-link 3LTT bridge-leg (1200 V and 650 V SiC MOSFETs) operating with output currents up to 25 A confirms the good accuracy of the simplified switching-loss model.
Impact of degraded communication on interdependent power systems: The application of grid splitting
Tian, Di-An; Sansavini, Giovanni (2016)
Electronics
Communication is increasingly present for managing and controlling critical infrastructures strengthening their cyber interdependencies. In electric power systems, grid splitting is a topical communication-critical application. It amounts to separating a power system into islands in response to an impending instability, e.g., loss of generator synchronism due to a component fault, by appropriately disconnecting transmission lines and grouping synchronous generators. The successful application of grid splitting depends on the communication infrastructure to collect system-wide synchronized measurements and to relay the command to open line switches. Grid splitting may be ineffective if communication is degraded and its outcome may also depend on the system loading conditions. This paper investigates the effects of degraded communication and load variability on grid splitting. To this aim, a communication delay model is coupled with a transient electrical model and applied to the IEEE 39-Bus and the IEEE 118-Bus Test System. Case studies show that the loss of generator synchronism following a fault is mitigated by timely splitting the network into islands. On the other hand, the results show that communication delays and increased network flows can degrade the performance of grid splitting. The developed framework enables the identification of the requirements of the dedicated communication infrastructure for a successful grid-splitting procedure.
Resilience evaluation of multi-path routing against network attacks and failures
An, Hyok; Na, Yoonjong; Lee, Heejo; et al. (2021)
Electronics
The current state of security and availability of the Internet is far from being commensurate with its importance. The number and strength of DDoS attacks conducted at the network layer have been steadily increasing. However, the single path (SP) routing used in today’s Internet lacks a mitigation scheme to rapidly recover from network attacks or link failure. In case of a link failure occurs, it can take several minutes until failover. In contrast, multi-path routing can take advantage of multiple alternative paths and rapidly switch to another working path. According to the level of available path control, we classfy the multi-path routing into two types, first-hop multi-path (FMP) and multi-hop multi-path (MMP) routing. Although FMP routing supported by networks, such as SD-WAN, shows marginal improvements over the current SP routing of the Internet, MMP routing supported by a global Internet architecture provides strong improvement under network attacks and link failure. MMP routing enables changing to alternate paths to mitigate the network problem in other hops, which cannot be controlled by FMP routing. To show this comparison with practical outcome, we evaluate network performance in terms of latency and loss rate to show that MMP routing can mitigate Internet hazards and provide high availability on global networks by 18 participating ASes in six countries. Our evaluation of global networks shows that, if network attacks or failures occur in other autonomous systems (ASes) that FMP routing cannot avoid, it is feasible to deal with such problems by switching to alternative paths by using MMP routing. When the global evaluation is under a transit-link DDoS attack, the loss rates of FMP that pass the transit-link are affected significantly by a transit-link DDoS attack, but the other alternative MMP paths show stable status under the DDoS attack with proper operation.
Experimental Efficiency Evaluation of Stacked Transistor Half-Bridge Topologies in 14 nm CMOS Technology
Bezerra, Pedro A.M.; Krismer, Florian; Kolar, Johann W.; et al. (2021)
Electronics
Different Half-Bridge (HB) converter topologies for an Integrated Voltage Regulator (IVR), which serves as a microprocessor application, were evaluated. The HB circuits were implemented with Stacked Transistors (HBSTs) in a cutting-edge 14 nm CMOS technology node in order to enable the integration on the microprocessor die. Compared to a conventional realization of the HBST, it was found that the Active Neutral-Point Clamped (ANPC) HBST topology with Independent Clamp Switches (ICSs) not only ensured balanced blocking voltages across the series-connected transistors, but also featured a more robust operation and achieved higher efficiencies at high output currents. The IVR achieved a maximum efficiency of 85.3% at an output current of 300 mA and a switching frequency of 50 MHz. At the maximum measured output current of 780 mA, the efficiency was 83.1%. The active part of the IVR (power switches, gate-drivers, and level shifters) realized a high maximum current density of 24.7 A/mm2.
Three-Port Series-Resonant DC/DC Converter for Automotive Charging Applications
Schäfer, Jannik; Kolar, Johann W. (2021)
Electronics
In the energy distribution grid of electric vehicles (EVs), multiple different voltage potentials need to be interconnected, to allow arbitrary power flow between the various energy sources and the different electrical loads. However, between the different potentials, galvanic isolation is absolutely necessary, either due to safety reasons and/or due to different grounding schemes. This paper presents an isolated three-port DC/DC converter topology, which, in combination with an upstream PFC rectifier, can be used as combined EV charger for interconnecting the single-phase AC mains, the high-voltage (HV) battery and the low-voltage (LV) bus in EVs. The proposed topology comprises two synergetically controlled and magnetically coupled converter parts, namely, a series-resonant converter between the PFC-sided DC-link capacitor and the HV battery, as well as a phase-shifted full-bridge circuit equivalent in the LV port, and is mainly characterized by simplicity in terms of control and circuit complexity. For this converter, a simple soft switching modulation scheme is proposed and comprehensively analyzed, in consideration of all parasitic components of a real converter implementation. Based on this analysis, the design of a 3.6 kW, 500 V/500 V/15 V prototype is discussed, striving for the highest possible power density and as low as possible manufacturing costs, by using PCB-integrated windings for all magnetic components. The hardware demonstrator achieves a measured full-load efficiency in charge mode of 96.5% for nominal operating conditions and a power density of 16.4 kWL−1.

Publications 1 - 10 of 12

Journal: Electronics

Abbreviation

Publisher

Journal Volumes

ISSN

Description

Filters

Search Results