Tibor Schneider


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Last Name

Schneider

First Name

Tibor

Organisational unit

09477 - Vanbever, Laurent / Vanbever, Laurent

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Publications1 - 10 of 13
  • Schmid, Roland; Schneider, Tibor; Fragkouli, Georgia; et al. (2023)
    CoNEXT-SW '23: Proceedings of the on CoNEXT Student Workshop 2023
    Analyzing a network's behavior during convergence is challenging due to its highly non-deterministic nature. To address this, we developed BGPseer, the first analyzer that predicts specification violations during BGP convergence without network disruption. To do this both accurately and fast, BGPseer builds a probabilistic network timing model based on hardware measurements that allows to sample BGP message orderings, from which BGPseer estimates violation times. We implemented BGPseer by extending an open-source BGP simulator and show that it achieves 85--99% accuracy in estimating violation times in less than ten seconds.
  • Schneider, Tibor; Vissicchio, Stefano; Vanbever, Laurent (2025)
    Proceedings of the 22nd USENIX Symposium on Networked Systems Design and Implementation (NSDI ’25)
    To meet ever more stringent requirements, network operators often need to reason about worst-case link loads. Doing so involves analyzing traffic forwarding after failures and BGP route changes. State-of-the-art systems identify failure scenarios causing congestion, but they ignore route changes. We present Viper, the first verification system that efficiently finds maximum link loads under failures and route changes. The key building block of Viper is its ability to massively reduce the gigantic space of possible route changes thanks to (i) a router-based abstraction for route changes, (ii) a theoretical characterization of scenarios leading to worst-case link loads, and (iii) an approximation of input traffic matrices. We fully implement and extensively evaluate Viper. Viper takes only a few minutes to accurately compute all worst-case link loads in large ISP networks. It thus provides operators with critical support to robustify network configurations, improve network management and take business decisions.
  • Probabilistic Routing Algebras for QoS Routing
    Item type: Other Conference Item
    Mégret, Jean Bernard David; Schneider, Tibor; Vanbever, Laurent (2025)
    Proceedings of the ACM SIGCOMM 2025 Posters and Demos
    Algebraic structures have been practical tools in the field of protocol analysis and design by providing formal answers to routing problems. However, by means of abstractions, some information from the underlying network is lost, thus providing only a coarse approximation of the real situation. We propose an algebra modelling attributes of the network probabilistically to better characterise dependencies and randomness of real networks. This opens up new perspectives for quality of service routing and traffic engineering.
  • Wang, Xiaying; Schneider, Tibor; Hersche, Michael; et al. (2021)
    2021 IEEE International Symposium on Circuits and Systems (ISCAS)
    With Motor-Imagery (MI) Brain-Machine Interfaces (BMIs) we may control machines by merely thinking of performing a motor action. Practical use cases require a wearable solution where the classification of the brain signals is done locally near the sensor using machine learning models embedded on energy-efficient microcontroller units (MCUs), for assured privacy, user comfort, and long-term usage. In this work, we provide practical insights on the accuracy-cost tradeoff for embedded BMI solutions. Our proposed Multispectral Riemannian Classifier reaches 75.1% accuracy on 4-class MI task. We further scale down the model by quantizing it to mixed-precision representations with a minimal accuracy loss of 1%, which is still 3.2% more accurate than the state-of-the- art embedded convolutional neural network. We implement the model on a low-power MCU with parallel processing units taking only 33.39 ms and consuming 1.304 mJ per classification. © 2021 IEEE
  • Schmid, Roland; Schneider, Tibor; Fragkouli, Georgia; et al. (2025)
    Proceedings of the ACM on Networking
    Analyzing transient violations of reachability---that happen while routing protocols are re-converging---helps in improving network availability and offering more precise SLAs. The key challenge is analyzing transient violations accurately, as they can be short-lived, for all affected prefix destinations, and practically, without worsening the network's performance. Existing approaches fail to address at least one of these goals: measurement approaches are accurate but only for the prefixes they can probe or observe traffic for, while techniques that estimate the convergence time use the same crude proxy for all prefixes. To achieve all three goals, we present TRIX, a system that infers transient violation times for BGP events from logged routing events or collected BGP messages. TRIX' key insight is that we do not need to probe all destinations if we use available information to infer the router-local forwarding state, for all destinations, and reconstruct the network-wide violations from router-level state. However, the logged events contain control-plane information that is inaccurate in terms of the content and the times of the forwarding updates, while reconstructing network-wide violations requires reasoning about the flow of traffic through the network. TRIX solves these challenges by simulating the BGP control-plane, modeling the FIB-update rate, and combining the state across routers with propagation delays. To evaluate TRIX, we implement a testbed that relies on a programmable switch and uses 12 real routers. Our evaluation shows that TRIX' inferred reachability violation times are on average within 13--25ms from the ground truth, and inference scales to large networks.
  • Schneider, Tibor; Wang, Xiaying; Hersche, Michael; et al. (2020)
    2020 IEEE International Conference on Smart Computing (SMARTCOMP)
  • Mégret, Jean Bernard David; Schneider, Tibor; Vanbever, Laurent (2025)
  • Wang, Xiaying; Cavigelli, Lukas Arno Jakob; Schneider, Tibor; et al. (2021)
    IEEE Transactions on Biomedical Circuits and Systems
    Motor imagery (MI) brain–machine interfaces (BMIs) enable us to control machines by merely thinking of performing a motor action. Practical use cases require a wearable solution where the classification of the brain signals is done locally near the sensor using machine learning models embedded on energy-efficient microcontroller units (MCUs), for assured privacy, user comfort, and long-term usage. In this work, we provide practical insights on the accuracy-cost trade-off for embedded BMI solutions. Our multispectral Riemannian classifier reaches 75.1% accuracy on a 4-class MI task. The accuracy is further improved by tuning different types of classifiers to each subject, achieving 76.4%. We further scale down the model by quantizing it to mixed-precision representations with a minimal accuracy loss of 1% and 1.4%, respectively, which is still up to 4.1% more accurate than the state-of-the-art embedded convolutional neural network. We implement the model on a low-power MCU within an energy budget of merely 198 μ J and taking only 16.9 ms per classification. Classifying samples continuously, overlapping the 3.5 s samples by 50% to avoid missing user inputs allows for operation at just 85 μ W. Compared to related works in embedded MI-BMIs, our solution sets the new state-of-the-art in terms of accuracy-energy trade-off for near-sensor classification.
  • Schneider, Tibor; Schmid, Roland; Vanbever, Laurent (2022)
    2022 IEEE 30th International Conference on Network Protocols (ICNP)
    Configuration Synthesis promises to increase automation in network hardware configuration but is generally assumed to constitute a computationally hard problem. We conduct a formal analysis of the computational complexity of network-wide Configuration Synthesis to establish this claim formally. To that end, we consider Configuration Synthesis as a decision problem, whether or not the selected routing protocol(s) can implement a given set of forwarding properties. We find the complexity of Configuration Synthesis heavily depends on the combination of the forwarding properties that need to be implemented in the network, as well as the employed routing protocol(s). Our analysis encompasses different forwarding properties that can be encoded as path constraints, and any combination of distributed destination-based hop-by-hop routing protocols. Many of these combinations yield NP-hard Configuration Synthesis problems; in particular, we show that the satisfiability of a set of arbitrary waypoints for any hop-by-hop routing protocol is NP-complete. Other combinations, however, show potential for efficient, scalable Configuration Synthesis.
  • Chen, Yu; Schneider, Tibor; Vanbever, Laurent (2023)
    CoNEXT-SW '23: Proceedings of the on CoNEXT Student Workshop 2023
    Control plane verification promises to help operators build reliable networks by reporting a counterexample that violates the specification. However, a single counterexample imposes a major challenge for operators to understand and repair the violation. To improve the usability of control plane verification, we present the first verifier computing the space of all specification violations as a symbolic expression. Our prototype implementation computes the causality between the network routing state and the external routing inputs that induce that state. Describing the space of all violations helps operators address the root cause of the violation, while presenting the space as a symbolic expression allows operators to further manipulate the output to inspect certain aspects of the problem.
Publications1 - 10 of 13