Michael Haider

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Haider

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Michael

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0000-0002-8881-6631

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Publications1 - 10 of 22

Dual-Inverter Topology for Single-Phase Supplied Drive Systems without Electrolytic Capacitor
Haider, Michael; Bortis, Dominik; Miric, Spasoje; et al. (2021)
2021 24th International Conference on Electrical Machines and Systems (ICEMS)
Single-phase supplied variable speed drive (VSD) systems are widely used in industrial applications and typically feature a two-stage design with a power factor corrected (PFC) boost rectifier and a three-phase voltage source inverter (VSI). However, the electrolytic DC-link capacitor, which is needed to cope with the twice grid frequency power pulsation, and the required boost inductor are unfavourable in terms of reliability, volume, cost, and complexity. Therefore, the proposed concept employs a dual-inverter topology with a three-phase open-end winding (OEW) machine, avoiding high-frequency inductors, and controls the system such that the power pulsation is buffered in the inertia of the drive train. Accordingly, the DC-link capacitance can be reduced drastically, enabling an electrolytic capacitor-less system, featuring a higher power density and an increased lifetime. This paper presents the operating principle and the corresponding closed-loop control structure, to achieve PFC operation, DC-link voltage balancing and average speed control. Detailed analysis reveals that the machine voltage can be selected independently of the grid peak voltage in contrast to existing concepts. The converter performance is evaluated based on simple performance indices with respect to the machine voltage. In the context of a 7.5kW compressor application for railway brakes with a wide input voltage range, a semiconductor loss reduction of 30% can be obtained compared to a state-of-the-art approach, further reducing the converter volume. Finally, the proper operation is verified with a closed-loop circuit simulation.
Application of WBG Power Devices in Future 3-Φ Variable Speed Drive Inverter Systems "How to Handle a Double-Edged Sword"
Kolar, Johann W.; Azurza Anderson, Jon; Miric, Spasoje; et al. (2020)
2020 IEEE International Electron Devices Meeting (IEDM)
Latest research results on three-phase wide-bandgap (WBG) inverter systems with full-sinewave output voltage filtering are reported. A new soft-switching modulation scheme for two-level 1200 V SiC inverters is described. Furthermore, a new Figure-of-Merit for determining maximum multi-level (ML) bridge-leg efficiency is defined and low-voltage GaN devices are evaluated considering ML flying capacitor (FC) and multi-cell inverter structures. Finally, new integrated-filter buck-boost current DC-link inverter topologies are discussed.
Three-Phase Bidirectional Buck-Boost Current DC-Link EV Battery Charger Featuring a Wide Output Voltage Range of 200 to 1000V
Zhang, Daifei; Guacci, Mattia; Haider, Michael; et al. (2020)
2020 IEEE Energy Conversion Congress and Exposition (ECCE)
High power EV chargers connected to an AC power distribution bus are employing a three-phase AC/DC Power Factor Correction (PFC) front-end and a series-connected isolated DC/DC converter to efficiently regulate the traction battery voltage and supply the required charging current. In this paper, the component stresses and the design optimization of a novel two-stage three-phase bidirectional buck-boost current DC-link PFC rectifier system, realized solely with SiC power MOSFETs and conveniently requiring only a single magnetic component, are introduced. This topology offers a high efficiency in a wide operating range thanks to the synergetic operation of its two stages, the three-phase buck-type current source rectifier stage and the subsequent three-level boost-type DC/DC-stage, which makes it suitable for on-board as well as off-board charger applications. The calculated voltage and current component stresses of the proposed converter system, considering an output voltage range of 200 to 1000 V and up to 10 kW of output power, help to identify its operating boundaries, maximizing the utilization of the power semiconductors and of the DC-link inductor. The optimum values of the circuit parameters are selected after evaluating the converter average efficiency η¯ and volumetric power density ρ in the Pareto performance space and analyzing its design space diversity, focusing on the semiconductor losses and on the characteristics of the inductor. Considering typical EV battery charging profiles, i.e. taking both full-load and part-load operation into account, a power converter realization featuring η¯ = 98.5% and ρ = 13.9 kW/dm3 is achieved. © 2020 IEEE.
Comparative Evaluation of Gate Driver and LC-Filter Based dv/dt-Limitation for SiC-Based Motor-Integrated Variable Speed Drive Inverters
Haider, Michael; Niklaus, Pascal; Madlener, Manuel; et al. (2023)
IEEE Open Journal of Power Electronics
Compared to state-of-the-art IGBTs, SiC power semiconductors allow to achieve ever higher system efficiencies and higher power densities in next-generation Variable Speed Drives (VSDs), thanks to their smaller relative chip size, ohmic on-state characteristic and lower specific switching losses resulting in a smaller switching-stage footprint and lower heat sink as well as DC-link capacitor volumes. However, the high slew rate of the switching transitions, an inherent consequence of the low switching losses, represents a major challenge and potentially results in lifetime degrading unequal voltage distribution across the motor windings and bearing currents. This work analytically and experimentally compares different means for dv/dt-limitation, namely, a conventional passive LC-dv/dt-filter and a Gate Driver (GD)-based approach based on increased GD resistances in combination with explicit Miller capacitors, at the example of a 10 kW industrial motor-integrated VSD. For a state-of-the-art dv/dt-limitation of up to 6 V/ns the LC-filter shows lower losses compared to the GD-based limitation. The latter, however, has a higher part-load efficiency and/or lower losses compared to the (roughly) load independent losses in the LC-filter resulting from the dissipation of the energy stored in the filter capacitor within each switching cycle, beneficial for light loads, e.g., < 40 % of rated output power. Next-generation motors with reinforced insulation allow a dv/dt-limitation of up to 15 V/ns. In this case, the GD-based limitation shows lower losses in the whole operating range, since they directly scale with the now smaller overlap of voltage and current resulting from the faster switching transitions. Considering a state-of-the-art motor, finally, a hardware demonstrator of a three-phase VSD employing an LC-filter to limit the dv/dt to 5.6 V/ns is realized, which achieves a full inverter stage power density of 30 kW/dm(3 )(497 W/in(3)) and an inverter efficiency of > 99 %.
Comparative Evaluation of ARCP and Three-Level TCM Soft-Switching Bridge-Legs for High-Frequency SiC Converter Systems
Langbauer, Thomas; Miric, Spasoje; Haider, Michael; et al. (2022)
2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia)
Soft-switching bridge-legs facilitate high-efficiency three-phase PV inverters or PFC rectifiers. By extending a half-bridge with a resonant auxiliary circuit, including two additional transistors, zero-voltage switching (ZVS) of the main transistors can be realized (Active Resonant Commutated Pole, ARCP). Alternatively, a similar T-type bridge-leg structure achieves ZVS by operating the output filter inductor with a sufficiently high current ripple (with 3-level Triangular Current Modulation, 3L-TCM). We provide a comparative evaluation of these two concepts for the realization of 2.2 kW (per phase), 800 V DC bridge-legs with latest-generation 1200 V and 650 V SiC MOSFETs, discussing chip-area optimization, filter design for compliance with current and future EMI limits, and qualitative limits and design criteria. The calculated loss-vs.-volume Pareto fronts indicate advantages for the 3L-TCM approach, with peak switching frequencies of 72 kHz or 144 kHz and an efficiency (semiconductors and EMI filter) of about 99.6 %. The ARCP concept seems more suitable for applications that do not necessarily require EMI filters but benefit from limited switch-node dv/dt (in the order of 1.5 V/ns) such as variable-speed drives.
Novel Single-Phase Buck+Boost PFC Rectifier with Integrated Series Power Pulsation Buffer
Haider, Michael; Bortis, Dominik; Kolar, Johann W.; et al. (2019)
2019 10th International Conference on Power Electronics and ECCE Asia (ICPE 2019 - ECCE Asia)
Analysis and Evaluation of Active/Hybrid/Passive dv/dt-Filter Concepts for Next Generation SiC-Based Variable Speed Drive Inverter Systems
Haider, Michael; Guacci, Mattia; Bortis, Dominik; et al. (2020)
2020 IEEE Energy Conversion Congress and Exposition (ECCE)
State-of-the-art variable speed drive inverter systems are typically employing 1200 V Si IGBTs with antiparallel freewheeling diodes, resulting in a large overall semiconductor chip area, relatively high switching losses and/or low switching frequencies, and causing a substantial on-state voltage drop in both current directions, which inherently limits the peak and part-load efficiency. SiC MOSFETs are seen as natural future replacement of Si IGBTs, since they benefit from high switching speeds and low on-state resistances, which drastically reduces switching and conduction losses. However, the high switching speed of SiC devices results in a dv/dt-stress on the motor windings of up to 60...80 V/ ns , which must be limited to 3...6 V/ ns in order to prevent partial discharge phenomena and/or progressive insulation aging. Full sinewave filtering could solve this issue, but would also reduce the achievable performance improvement, as a higher switching frequency and/or a bulky filter would be required. Therefore, this paper comparatively evaluates different dv/dt-limitation approaches proposed in literature, i.e. active, hybrid and passive filter concepts, for a next generation 10kW SiC PWM inverter supplied from an 800V DC-bus. First, the different filter concepts are described and analyzed, and in a second step their design procedure is explained based on the design space approach. Afterwards, a Pareto optimization is conducted and Pareto optimal designs are selected, evaluated and compared regarding efficiency and power density. All considered filter designs outperform a state-of-the-art typically 98.3% efficient IGBT inverter drive. The hybrid filter enables a part-load (at 8 kW) efficiency of 99.0% for a dv/dt limited to 6 V/ ns . If higher dv/dt -values can be tolerated, e.g. 12 V/ ns , 99.3% part-load efficiency with a power density above 80 kW/L can be achieved by the active concept. © 2020 IEEE
Motor-Integrated Power Factor Corrected Single-to-Three-Phase AC/AC Converter Concepts
Haider, Michael (2022)
Novel ZVS S-TCM Modulation of Three-Phase AC/DC Converters
Haider, Michael; Azurza Anderson, Jon; Miric, Spasoje; et al. (2020)
IEEE Open Journal of Power Electronics
For three-phase AC-DC power conversion, the widely-used continuous current mode (CCM) modulation scheme results in relatively high semiconductor losses from hard-switching each device during half of the mains cycle. Triangular current mode (TCM) modulation, where the inductor current reverses polarity before turn-off, achieves zero-voltage-switching (ZVS) but at the expense of a wide switching frequency variation (15× for the three-phase design considered here), complicating filter design and compliance with EMI regulations. In this paper, we propose a new modulation scheme, sinusoidal triangular current mode (S-TCM), that achieves soft-switching, keeps the maximum switching frequency below the 150 kHz EMI regulatory band, and limits the switching frequency variation to only 3×. Under S-TCM, three specific modulation schemes are analyzed, and a loss-optimized weighting of the current bands across load is identified. The 2.2 kW S-TCM phase-leg hardware demonstrator achieves 99.7% semiconductor efficiency, with the semiconductor losses accurately analytically estimated within 10% (0.3 W). Relative to a CCM design, the required filter inductance is 6× lower, the inductor volume is 37% smaller, and the semiconductor losses are 55% smaller for a simultaneous improvement in power density and efficiency.
Sinusoidal Input Current and Average Speed Control of a Single-Phase Supplied Three-Phase Inverter Drive Without Electrolytic Capacitor
Haider, Michael; Bortis, Dominik; Kolar, Johann W.; et al. (2018)
2018 IEEE 18th International Power Electronics and Motion Control Conference (PEMC)

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