4H-SiC Power VDMOSFET Manufacturing Utilizing POCl3 Post Oxidation Annealing


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Date

2020-07

Publication Type

Conference Paper

ETH Bibliography

yes

Citations

Altmetric

Data

Abstract

A novel POCl3 post-oxidation annealing recipe was developed. The interface trap density (Dit) is extracted by the C-ΨS method close to conduction band edge. The performance of the POCl3-treated oxide has been analyzed based on current density-electric field (J-E) measurements. A comprehensive and practical 4H-SiC power VDMOSFET manufacturing traveler has been designed. The power MOSFET that was fabricated based on this traveler exhibits less than half of the on-resistance and shows improved interface characteristics compared to a similarly designed commercial power MOSFET.

Publication status

published

Editor

Book title

Volume

1004

Pages / Article No.

559 - 564

Publisher

Trans Tech Publications

Event

International Conference for Silicon Carbide and Related Materials (ICSCRM 2019)

Edition / version

Methods

Software

Geographic location

Date collected

Date created

Subject

4H-SiC Power VDMOSFET; Device Characterization; Device Processing; POCl3 Post Oxidation Annealing

Organisational unit

09480 - Grossner, Ulrike / Grossner, Ulrike check_circle

Notes

Funding

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