High Throughput Hardware Accelerated CoreSight Trace Decoding
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Author / Producer
Date
2024
Publication Type
Conference Paper
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yes
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Abstract
A single tracing component embedded into a high-frequency processor may produce up to 1 GB/s of trace data or more. These data are vital in debugging, monitoring, verification, and performance analysis in System-on-chip and heterogeneous system development. Hardware trace decoders and analyzers have emerged to support online processing of trace data for real-time applications. However, the existing hardware trace decoders designed for the Embedded Trace Macrocell version 4 (ETMv4), a standard feature in most modern ARM processors, can only process trace data at a maximum rate of 250 MB/s. This paper proposes an optimized and parallelized trace decoder for the ETMv4 specification implemented on a Xilinx Ultrascale+ processing up to 1 GB/s of trace data from a single ETM.
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Publication status
published
Editor
Book title
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Journal / series
Volume
Pages / Article No.
10546666
Publisher
IEEE
Event
27th Design, Automation and Test in Europe Conference and Exhibition (DATE 2024)
Edition / version
Methods
Software
Geographic location
Date collected
Date created
Subject
Tracing; Coresight; ETM; Decoding; FPGA
Organisational unit
03757 - Roscoe, Timothy / Roscoe, Timothy