Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology
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Date
2020
Publication Type
Other Conference Item
ETH Bibliography
yes
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Abstract
To provide high computational capabilities, and, at the same time, minimize the power consumption, modern Systems-on-Chip (SoCs) target very low energy consumption per operation as a primary objective. This goal has been achieved in recent years by adopting simple, yet very effective strategies like aggressive voltage and frequency scaling. However, the process variations that affects highly scaled technology nodes represents a severe limitation to the application of such techniques [2]; forcing digital designers to account for significant supply voltage margins to guarantee sign-off frequencies [1].
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Publication status
published
Editor
Book title
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
Journal / series
Volume
Pages / Article No.
9180961
Publisher
IEEE
Event
2020 IEEE International Symposium on Circuits and Systems (ISCAS 2020) (virtual)
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Methods
Software
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Date collected
Date created
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Organisational unit
03996 - Benini, Luca / Benini, Luca
Notes
Due to the Coronavirus (COVID-19) the conference was conducted virtually.