A 3.6pJ/b 56Gb/s 4-PAM receiver with 6-Bit TI-SAR ADC and quarter-rate speculative 2-tap DFE in 32 nm CMOS
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Author / Producer
Date
2015
Publication Type
Conference Paper
ETH Bibliography
yes
Citations
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Rights / License
Permanent link
Publication status
published
External links
Book title
Proceedings of the 41st European Solid-State Circuits Conference (ESSCIRC 2015)
Journal / series
Volume
Pages / Article No.
148 - 151
Publisher
IEEE
Event
41st European Solid-State Circuits Conference, ESSCIRC 2015