Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml


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Date

2022-12

Publication Type

Journal Article

ETH Bibliography

yes

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Abstract

In this paper, we investigate how field programmable gate arrays can serve as hardware accelerators for real-time semantic segmentation tasks relevant for autonomous driving. Considering compressed versions of the ENet convolutional neural network architecture, we demonstrate a fully-on-chip deployment with a latency of 4.9 ms per image, using less than 30% of the available resources on a Xilinx ZCU102 evaluation board. The latency is reduced to 3 ms per image when increasing the batch size to ten, corresponding to the use case where the autonomous vehicle receives inputs from multiple cameras simultaneously. We show, through aggressive filter reduction and heterogeneous quantization-aware training, and an optimized implementation of convolutional layers, that the power consumption and resource utilization can be significantly reduced while maintaining accuracy on the Cityscapes dataset.

Publication status

published

Editor

Book title

Volume

3 (4)

Pages / Article No.

45011

Publisher

IOP Publishing

Event

Edition / version

Methods

Software

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Date collected

Date created

Subject

FPGA; computer vision; deep learning; hls4ml; machine learning; autonomous vehicles; semantic segmentation

Organisational unit

03593 - Dissertori, Günther / Dissertori, Günther check_circle

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