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dc.contributor.author
Burkart, Ralph M.
dc.contributor.author
Kolar, Johann W.
dc.date.accessioned
2017-06-12T20:25:24Z
dc.date.available
2017-06-12T20:25:24Z
dc.date.issued
2017-07
dc.identifier.issn
0885-8993
dc.identifier.issn
1941-0107
dc.identifier.other
10.1109/TPEL.2016.2614139
dc.identifier.uri
http://hdl.handle.net/20.500.11850/129647
dc.language.iso
en
dc.publisher
IEEE
dc.subject
Costs
dc.subject
DC-DC power conversion
dc.subject
Multilevel systems
dc.subject
Optimization methods
dc.subject
Software prototyping
dc.title
Comparative η-ρ-σ pareto optimization of Si and SiC multilevel dual-active-bridge topologies with wide input voltage range
dc.type
Journal Article
ethz.journal.title
IEEE Transactions on Power Electronics
ethz.journal.volume
32
ethz.journal.issue
7
ethz.journal.abbreviated
IEEE trans. power electron.
ethz.pages.start
5258
ethz.pages.end
5270
ethz.notes
Published online 3 October 2016.
ethz.identifier.wos
ethz.identifier.scopus
ethz.identifier.nebis
010840495
ethz.publication.place
New York, NY
ethz.publication.status
published
ethz.date.deposited
2017-06-12T20:26:33Z
ethz.source
ECIT
ethz.identifier.importid
imp59365558db12f24160
ethz.ecitpid
pub:192631
ethz.eth
yes
ethz.availability
Metadata only
ethz.rosetta.installDate
2017-07-13T14:54:07Z
ethz.rosetta.lastUpdated
2018-01-10T08:37:37Z
ethz.rosetta.versionExported
true
ethz.COinS
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