Operation and performance limits of MOS controlled semiconductor power devices
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Author
Date
1995Type
- Doctoral Thesis
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https://doi.org/10.3929/ethz-a-001410927Publication status
publishedExternal links
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ETH ZürichSubject
LEISTUNGSELEKTRONIK; HALBLEITERBAUELEMENTE + ELEKTRONISCHE BAUELEMENTE (ELEKTRONIK); BIPOLARE METALOXIDHALBLEITER, BIMOS (HALBLEITERTECHNOLOGIE); ABSCHALTTHYRISTOREN, GTO (ELEKTRONIK); INSULATED-GATE-BIPOLAR-TRANSISTOREN, IGBT (ELEKTRONIK); METAL OXIDE SEMICONDUCTOR-TRANSISTOREN, MOS (ELEKTRONIK); LEISTUNGSHALBLEITER (ELEKTRONIK); MOS GESTEUERTE THYRISTOREN, MCT (ELEKTRONIK); POWER ELECTRONICS; SEMICONDUCTOR COMPONENTS + ELECTRONIC COMPONENTS (ELECTRONICS); BIPOLAR METAL OXIDE SEMICONDUCTORS, BIMOS (SEMICONDUCTOR TECHNOLOGY); GATE TURN-OFF THYRISTORS, GTO (ELECTRONICS); INSULATED-GATE-BIPOLAR-TRANSISTORS, IGBT (ELECTRONICS); METAL OXIDE SEMICONDUCTOR TRANSISTORS, MOS (ELECTRONICS); POWER SEMICONDUCTORS (ELECTRONICS); MOS CONTROLLED THYRISTORS, MCT (ELECTRONICS)Notes
Diss. Techn. Wiss. ETH Zürich, Nr. 10819, 1995. Ref.: W. Fichtner ; Korref.: A. Jaecklin.More
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