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dc.contributor.author
Mueller, Rene
dc.contributor.author
Teubner, Jens
dc.contributor.author
Alonso, Gustavo
dc.date.accessioned
2017-06-14T19:48:00Z
dc.date.available
2017-06-14T19:48:00Z
dc.date.issued
2012-02
dc.identifier.issn
1066-8888
dc.identifier.issn
0949-877X
dc.identifier.other
10.1007/s00778-011-0232-z
dc.identifier.uri
http://hdl.handle.net/20.500.11850/160680
dc.language.iso
en
dc.publisher
Springer
dc.subject
Sorting networks
dc.subject
FPGA
dc.subject
Hardware accelerators
dc.title
Sorting networks on FPGAs
dc.type
Journal Article
ethz.journal.title
The VLDB Journal
ethz.journal.volume
21
ethz.journal.issue
1
ethz.journal.abbreviated
VLDB j.
ethz.pages.start
1
ethz.pages.end
23
ethz.notes
Received 31 March 2010, Accepted 10 August 2010, Published online 1 June 2011.
ethz.identifier.wos
ethz.identifier.nebis
001604632
ethz.publication.place
Berlin
ethz.publication.status
published
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02150 - Dep. Informatik / Dep. of Computer Science::02663 - Institut für Computing Platforms / Institute for Computing Platforms::03506 - Alonso, Gustavo / Alonso, Gustavo
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02150 - Dep. Informatik / Dep. of Computer Science::02663 - Institut für Computing Platforms / Institute for Computing Platforms::03506 - Alonso, Gustavo / Alonso, Gustavo
ethz.date.deposited
2017-06-14T19:48:04Z
ethz.source
ECIT
ethz.identifier.importid
imp59364e7e82cdc65206
ethz.ecitpid
pub:65847
ethz.eth
yes
ethz.availability
Metadata only
ethz.rosetta.installDate
2017-07-18T09:54:04Z
ethz.rosetta.lastUpdated
2018-11-05T11:30:35Z
ethz.rosetta.versionExported
true
ethz.COinS
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