Suppression of gate-induced drain leakage by optimization of junction profiles in 22 nm and 32 nm SOI nFETs
Metadata only
Autor(in)
Datum
2010Typ
- Conference Paper
ETH Bibliographie
yes
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Publikationsstatus
publishedExterne Links
Zeitschrift / Serie
Solid-State ElectronicsBand
Seiten / Artikelnummer
Verlag
ElsevierKonferenz
Thema
TCAD; Simulation; Gate induced drain leakage; Non-local band-to-band tunneling; High-K gate stacks; DGSOI; SGSOI; 22 nm technology nodeOrganisationseinheit
03228 - Fichtner, Wolfgang
Anmerkungen
Received 23 April 2009, Revised 11 June 2009, Accepted 21 August 2009, Available online 29 December 2009.ETH Bibliographie
yes
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