Analysis and Comparative Evaluation of Stacked-Transistor Half-Bridge Topologies Implemented with 14 nm Bulk CMOS Technology
dc.contributor.author
Bezerra, Pedro A.M.
dc.contributor.author
Khaddam-Aljameh, Riduan
dc.contributor.author
Krismer, Florian
dc.contributor.author
Kolar, Johann W.
dc.contributor.author
Sridhar, Arvind
dc.contributor.author
Brunschwiler, Thomas
dc.contributor.author
Toifl, Thomas
dc.date.accessioned
2017-09-27T10:59:28Z
dc.date.available
2017-09-27T07:36:05Z
dc.date.available
2017-09-27T09:10:54Z
dc.date.available
2017-09-27T09:58:16Z
dc.date.available
2017-09-27T10:44:22Z
dc.date.available
2017-09-27T10:59:28Z
dc.date.issued
2017
dc.identifier.isbn
978-1-5090-5326-1
en_US
dc.identifier.isbn
978-1-5090-5325-4
en_US
dc.identifier.isbn
978-1-5090-5327-8
en_US
dc.identifier.other
10.1109/COMPEL.2017.8013307
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dc.identifier.uri
http://hdl.handle.net/20.500.11850/187492
dc.identifier.doi
10.3929/ethz-b-000187492
dc.format
application/pdf
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.rights.uri
http://rightsstatements.org/page/InC-NC/1.0/
dc.subject
IVR
en_US
dc.subject
CMOS
en_US
dc.subject
Stacked transistors
en_US
dc.subject
Half-bridge
en_US
dc.subject
Multiphase
en_US
dc.subject
14 nm technology
en_US
dc.title
Analysis and Comparative Evaluation of Stacked-Transistor Half-Bridge Topologies Implemented with 14 nm Bulk CMOS Technology
en_US
dc.type
Conference Paper
dc.rights.license
In Copyright - Non-Commercial Use Permitted
dc.date.published
2017-08-21
ethz.book.title
2017 IEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL)
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ethz.pages.start
8013307
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ethz.size
8 p.
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ethz.version.deposit
acceptedVersion
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ethz.event
2017 IEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL)
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ethz.event.location
Stanford, CA, USA
en_US
ethz.event.date
July 9-12, 2017
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ethz.grant
Manufacturing of Modular Interposer providing scalable Heat Removal, Power Delivery and Optical Signaling
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ethz.identifier.scopus
ethz.publication.place
Piscataway, NJ
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ethz.publication.status
published
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ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::03573 - Kolar, Johann W. (emeritus) / Kolar, Johann W. (emeritus)
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::03573 - Kolar, Johann W. (emeritus) / Kolar, Johann W. (emeritus)
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ethz.grant.agreementno
619488
ethz.grant.agreementno
619488
ethz.grant.fundername
EC
ethz.grant.fundername
EC
ethz.grant.funderDoi
10.13039/501100000780
ethz.grant.funderDoi
10.13039/501100000780
ethz.grant.program
FP7
ethz.grant.program
FP7
ethz.date.deposited
2017-09-27T07:36:06Z
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FORM
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yes
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ethz.availability
Open access
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ethz.rosetta.installDate
2017-09-27T09:10:58Z
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2023-02-06T14:35:23Z
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