Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS
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Author
Date
2017-09Type
- Journal Article
Publication status
publishedExternal links
Journal / series
IEEE Transactions on Circuits and Systems I: Regular PapersVolume
Pages / Article No.
Publisher
IEEESubject
wake-up event classification; all-digital FLL; IoT; Transient Clocking; clock synthesizer; fast start-up; dithering; jitter reductionOrganisational unit
03996 - Benini, Luca / Benini, Luca
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