Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS - Research Collection

Metadata only

Author

Bellasi, David E.

Benini, Luca

Date

2017-09

Type

Journal Article

Citations

Cited 3 times in Web of Science

ETH Bibliography

yes

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Publication status

published

External links

https://doi.org/10.1109/TCSI.2017.2694322

Journal / series

IEEE Transactions on Circuits and Systems I: Regular Papers

Volume

64(9)

Pages / Article No.

2322 - 2333

Publisher

IEEE

Subject

wake-up event classification; all-digital FLL; IoT; Transient Clocking; clock synthesizer; fast start-up; dithering; jitter reduction

Organisational unit

03996 - Benini, Luca / Benini, Luca

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Show all metadata

Citations

Cited 3 times in Web of Science

ETH Bibliography

yes

Altmetrics