Logic-Base Interconnect Design for Near Memory Computing in the Smart Memory Cube - Research Collection

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Author

Azarkhish, Erfan

Pfister, Christoph

Rossi, Davide

Loi, Igor

Benini, Luca

Date

2017-01

Type

Journal Article

Citations

Cited 5 times in Web of Science

ETH Bibliography

yes

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Publication status

published

External links

https://doi.org/10.1109/TVLSI.2016.2570283

Journal / series

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volume

25(1)

Pages / Article No.

210 - 223

Publisher

IEEE

Subject

3-D integration; Address scrambling; Cycle accurate (CA) model; Interconnect design; Smart memory cube (SMC)

Organisational unit

03996 - Benini, Luca / Benini, Luca

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Citations

Cited 5 times in Web of Science

ETH Bibliography

yes

Altmetrics