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dc.contributor.author
Kull, Lukas
dc.contributor.author
Luu, Danny
dc.contributor.author
Menolfi, Christian
dc.contributor.author
Braendli, Matthias
dc.contributor.author
Francese, Pier A.
dc.contributor.author
Morf, Thomas
dc.contributor.author
Kossel, Marcel A.
dc.contributor.author
Yueksel, Hazar
dc.contributor.author
Cevrero, Alessandro
dc.contributor.author
Özkaya, Ilter
dc.contributor.author
Toifl, Thomas
dc.date.accessioned
2018-02-22T06:54:07Z
dc.date.available
2018-02-22T06:49:07Z
dc.date.available
2018-02-22T06:54:07Z
dc.date.available
2017-06-12T20:37:05Z
dc.date.available
2018-02-22T06:53:27Z
dc.date.available
2017-12-12T05:14:32Z
dc.date.issued
2017-03
dc.identifier.isbn
978-1-5090-3758-2
en_US
dc.identifier.isbn
978-1-5090-3759-9
en_US
dc.identifier.other
10.1109/ISSCC.2017.7870467
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/243207
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.title
28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET
en_US
dc.type
Conference Paper
ethz.book.title
2017 IEEE International Solid-State Circuits Conference (ISSCC)
en_US
ethz.journal.title
Digest of Technical Papers
ethz.journal.volume
60
en_US
ethz.pages.start
474
en_US
ethz.pages.end
475
en_US
ethz.event
64th IEEE International Solid-State Circuits Conference, ISSCC 2017
en_US
ethz.event.location
San Francisco, CA, USA
en_US
ethz.event.date
February 5-9, 2017
en_US
ethz.identifier.wos
ethz.identifier.scopus
ethz.publication.place
Piscataway, NJ
en_US
ethz.publication.status
published
en_US
ethz.date.deposited
2017-06-12T20:37:20Z
ethz.source
ECIT
ethz.source
WOS
ethz.identifier.importid
imp593655601992128942
ethz.ecitpid
pub:193015
ethz.eth
yes
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2018-02-22T11:58:28Z
ethz.rosetta.lastUpdated
2018-02-22T11:58:28Z
ethz.rosetta.versionExported
true
dc.identifier.olduri
http://hdl.handle.net/20.500.11850/130014
dc.identifier.olduri
http://hdl.handle.net/20.500.11850/219958
ethz.COinS
ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.atitle=28.5%20A%2010b%201.5GS/s%20pipelined-SAR%20ADC%20with%20background%20second-stage%20common-mode%20regulation%20and%20offset%20calibration%20in%2014nm%20CMOS%20FinFET&rft.jtitle=Digest%20of%20Technical%20Papers&rft.date=2017-03&rft.volume=60&rft.spage=474&rft.epage=475&rft.au=Kull,%20Lukas&Luu,%20Danny&Menolfi,%20Christian&Braendli,%20Matthias&Francese,%20Pier%20A.&rft.isbn=978-1-5090-3758-2&978-1-5090-3759-9&rft.genre=proceeding&rft_id=info:doi/978-1-5090-3758-2&info:doi/978-1-5090-3759-9&rft.btitle=2017%20IEEE%20International%20Solid-State%20Circuits%20Conference%20(ISSCC)
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