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dc.contributor.author
Conti, Francesco
dc.contributor.author
Cavigelli, Lukas
dc.contributor.author
Paulin, Gianna
dc.contributor.author
Susmelj, Igor
dc.contributor.author
Benini, Luca
dc.date.accessioned
2022-06-03T13:12:05Z
dc.date.available
2018-06-25T13:09:10Z
dc.date.available
2018-12-19T11:09:26Z
dc.date.available
2018-12-19T11:37:03Z
dc.date.available
2022-06-03T13:12:05Z
dc.date.issued
2018
dc.identifier.isbn
978-1-5386-2483-8
en_US
dc.identifier.isbn
978-1-5386-2482-1
en_US
dc.identifier.isbn
978-1-5386-2484-5
en_US
dc.identifier.other
10.1109/CICC.2018.8357068
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/272086
dc.identifier.doi
10.3929/ethz-b-000272086
dc.description.abstract
Recurrent neural networks (RNNs) are state-of-the-art in voice awareness/understanding and speech recognition. On-device computation of RNNs on low-power mobile and wearable devices would be key to applications such as zero-latency voice-based human-machine interfaces. Here we present CHIPMUNK, a small (<;1 mm 2 ) hardware accelerator for Long-Short Term Memory RNNs in UMC 65 nm technology capable to operate at a measured peak efficiency up to 3.08Gop/s/mW at 1.24 mW peak power. To implement big RNN models without incurring in huge memory transfer overhead, multiple CHIPMUNK engines can cooperate to form a single systolic array. In this way, the Chipmunk architecture in a 75 tiles configuration can achieve real-time phoneme extraction on a demanding RNN topology proposed in [1], consuming less than 13 mW of average power.
en_US
dc.format
application/pdf
en_US
dc.language.iso
en
en_US
dc.publisher
Curran
en_US
dc.rights.uri
http://rightsstatements.org/page/InC-NC/1.0/
dc.title
CHIPMUNK : A Systolically Scalable 0.9 mm2, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference
en_US
dc.type
Conference Paper
dc.rights.license
In Copyright - Non-Commercial Use Permitted
dc.date.published
2018-05-10
ethz.book.title
2018 IEEE Custom Integrated Circuits Conference (CICC)
en_US
ethz.pages.start
316
en_US
ethz.pages.end
319
en_US
ethz.size
4 p.
en_US
ethz.version.deposit
acceptedVersion
en_US
ethz.event
39th Annual Custom Integrated Circuits Conference (CICC 2018)
en_US
ethz.event.location
San Diego, CA, USA
en_US
ethz.event.date
April 8-11, 2018
en_US
ethz.identifier.wos
ethz.identifier.scopus
ethz.publication.place
Red Hook, NY
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
en_US
ethz.date.deposited
2018-06-14T06:41:52Z
ethz.source
SCOPUS
ethz.source
WOS
ethz.eth
yes
en_US
ethz.availability
Open access
en_US
ethz.rosetta.installDate
2018-06-25T13:09:14Z
ethz.rosetta.lastUpdated
2024-02-02T17:22:56Z
ethz.rosetta.versionExported
true
dc.identifier.olduri
http://hdl.handle.net/20.500.11850/269922
dc.identifier.olduri
http://hdl.handle.net/20.500.11850/271465
ethz.COinS
ctx_ver=Z39.88-2004&amp;rft_val_fmt=info:ofi/fmt:kev:mtx:journal&amp;rft.atitle=CHIPMUNK%20:%20A%20Systolically%20Scalable%200.9%20mm2,%203.08%20Gop/s/mW%20@%201.2%20mW%20Accelerator%20for%20Near-Sensor%20Recurrent%20Neural%20Network%20Inference&amp;rft.date=2018&amp;rft.spage=316&amp;rft.epage=319&amp;rft.au=Conti,%20Francesco&amp;Cavigelli,%20Lukas&amp;Paulin,%20Gianna&amp;Susmelj,%20Igor&amp;Benini,%20Luca&amp;rft.isbn=978-1-5386-2483-8&amp;978-1-5386-2482-1&amp;978-1-5386-2484-5&amp;rft.genre=proceeding&amp;rft_id=info:doi/10.1109/CICC.2018.8357068&amp;rft.btitle=2018%20IEEE%20Custom%20Integrated%20Circuits%20Conference%20(CICC)
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