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dc.contributor.author
Henzen, Luca
dc.contributor.author
Fichtner, Wolfgang
dc.date.accessioned
2017-06-09T09:06:22Z
dc.date.available
2017-06-09T09:06:22Z
dc.date.issued
2010
dc.identifier.isbn
978-1-424-46662-7
dc.identifier.isbn
978-1-4244-6664-1
dc.identifier.other
10.1109/ESSCIRC.2010.5619894
dc.identifier.uri
http://hdl.handle.net/20.500.11850/29394
dc.language.iso
en
dc.publisher
IEEE
dc.title
FPGA Parallel-Pipelined AES-GCM Core for 100G Ethernet Applications
dc.type
Conference Paper
ethz.book.title
Proceedings of the ESSCIRC, 2010 : 14 - 16 Sept. 2010, Sevilla, Spain
ethz.pages.start
202
ethz.pages.end
205
ethz.event
IEEE European Solid State Circuits Conference 2010 (ESSCIRC 2010)
ethz.event.location
Sevilla, Spain
ethz.event.date
September 14 - 16, 2010
ethz.notes
Date of Current Version 4 November 2010.
ethz.publication.place
Piscataway, NJ
ethz.publication.status
published
ethz.leitzahl
03228 - Fichtner, Wolfgang
ethz.leitzahl.certified
03228 - Fichtner, Wolfgang
ethz.date.deposited
2017-06-09T09:06:31Z
ethz.source
ECIT
ethz.identifier.importid
imp59364d995ddf254701
ethz.ecitpid
pub:48827
ethz.eth
yes
ethz.availability
Metadata only
ethz.rosetta.installDate
2017-07-13T07:04:54Z
ethz.rosetta.lastUpdated
2017-07-13T07:04:54Z
ethz.rosetta.versionExported
true
ethz.COinS
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