A 0.3PJ/Bit 112GB/S PAM4 1+0.5D TX-DFE Precoder and 8-Tap FFE in 14NM CMOS
dc.contributor.author
Toifl, Thomas
dc.contributor.author
Menolfi, Christian
dc.contributor.author
Braendli, Matthias
dc.contributor.author
Cevrero, Alessandro
dc.contributor.author
Francese, Pier A.
dc.contributor.author
Kossel, Marcel
dc.contributor.author
Kull, Lukas
dc.contributor.author
Luu, Danny
dc.contributor.author
Morf, Thomas
dc.contributor.author
Ozkaya, Ilter
dc.date.accessioned
2018-12-06T12:32:22Z
dc.date.available
2018-11-30T05:32:58Z
dc.date.available
2018-12-06T12:32:22Z
dc.date.issued
2018
dc.identifier.isbn
978-1-5386-4214-6
en_US
dc.identifier.isbn
978-1-5386-4215-3
en_US
dc.identifier.other
10.1109/VLSIC.2018.8502302
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/307492
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.title
A 0.3PJ/Bit 112GB/S PAM4 1+0.5D TX-DFE Precoder and 8-Tap FFE in 14NM CMOS
en_US
dc.type
Conference Paper
dc.date.published
2018-10-25
ethz.book.title
2018 Symposium on VLSI Circuits Digest of Technical Papers
en_US
ethz.pages.start
53
en_US
ethz.pages.end
54
en_US
ethz.event
2018 Symposium on VLSI Circuits Digest of Technical Papers
en_US
ethz.event.location
Honolulu, HI, USA
en_US
ethz.event.date
June 18-22, 2018
en_US
ethz.identifier.scopus
ethz.publication.place
Piscataway, NJ
en_US
ethz.publication.status
published
en_US
ethz.date.deposited
2018-11-30T05:33:03Z
ethz.source
SCOPUS
ethz.eth
yes
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2018-12-06T12:32:37Z
ethz.rosetta.lastUpdated
2018-12-06T12:32:37Z
ethz.rosetta.versionExported
true
ethz.COinS
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Conference Paper [35904]