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dc.contributor.author
Cesarini, Daniele
dc.contributor.author
Bartolini, Andrea
dc.contributor.author
Benini, Luca
dc.date.accessioned
2018-12-13T13:40:37Z
dc.date.available
2018-12-13T12:31:31Z
dc.date.available
2018-12-13T13:40:37Z
dc.date.issued
2017-02
dc.identifier.isbn
978-1-5386-2880-5
en_US
dc.identifier.isbn
978-1-5386-2881-2
en_US
dc.identifier.other
10.1109/VLSI-SoC.2017.8203471
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/310603
dc.identifier.doi
10.3929/ethz-b-000310603
dc.description.abstract
We are entering the era of thermally-bound computing: Advanced and costly cooling solutions are needed to sustain the high computing densities of high-performance computing equipment. To reduce cooling costs and cooling overprovisioning, dynamic thermal management (DTM) strategies aim at controlling the device temperature by modulating online the performance of processing elements. While operating systems allow the migration of threads between cores, in HPC systems the threads of parallel applications are pinned to the allocated cores at start-time to avoid job-migration overheads. In this scenario state-of-the-art DTM solutions, which use thermal models to map jobs to cores, are based on long-term predictions to map the most critical job to the coldest core. Instead, turbo-mode and DVFS controllers are based on short-term predictions to squeeze the thermal capacitance allowing for short period performance boosts which are thermally unsustainable. In this work we propose an integer-linear programming formulation and a fast solver for controlling, at the same time, the job mapping and cores frequency selections in HPC nodes, tested with real supercomputer workload. Our approach can be integrated with the MPI runtimes and OpenMP libraries and is capable of assigning high-performance cores to performance-critical threads. We show that by combining long and short term predictions with information of the programming model we can significantly improve the performance of final application w.r.t. state-of-the-art DTM solutions.
en_US
dc.format
application/pdf
en_US
dc.language.iso
en
en_US
dc.publisher
IEEE; Curran Associates.
en_US
dc.rights.uri
http://rightsstatements.org/page/InC-NC/1.0/
dc.title
Prediction Horizon vs. Efficiency of Optimal Dynamic Thermal Control Policies in HPC Nodes
en_US
dc.type
Conference Paper
dc.rights.license
In Copyright - Non-Commercial Use Permitted
dc.date.published
2017-12-14
ethz.book.title
2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
en_US
ethz.pages.start
106
en_US
ethz.pages.end
111
en_US
ethz.size
6 p.
en_US
ethz.version.deposit
acceptedVersion
en_US
ethz.event
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017)
en_US
ethz.event.location
Abu Dhabi, UAE
en_US
ethz.event.date
October 23-25, 2017
en_US
ethz.publication.place
Piscataway, NJ; Red Hook, NY
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
en_US
ethz.date.deposited
2018-12-13T12:31:31Z
ethz.source
FORM
ethz.eth
yes
en_US
ethz.availability
Open access
en_US
ethz.rosetta.installDate
2018-12-13T13:40:43Z
ethz.rosetta.lastUpdated
2019-01-03T13:35:00Z
ethz.rosetta.versionExported
true
ethz.COinS
ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.atitle=Prediction%20Horizon%20vs.%20Efficiency%20of%20Optimal%20Dynamic%20Thermal%20Control%20Policies%20in%20HPC%20Nodes&rft.date=2017-02&rft.spage=106&rft.epage=111&rft.au=Cesarini,%20Daniele&Bartolini,%20Andrea&Benini,%20Luca&rft.isbn=978-1-5386-2880-5&978-1-5386-2881-2&rft.genre=proceeding&rft_id=info:doi/978-1-5386-2880-5&info:doi/978-1-5386-2881-2&rft.btitle=2017%20IFIP/IEEE%20International%20Conference%20on%20Very%20Large%20Scale%20Integration%20(VLSI-SoC)
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