System-level performance evaluation of reconfigurable processors

Metadata only

Autor(in)

Datum

2005-04

Typ

Journal Article

ETH Bibliographie

yes

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Publikationsstatus

published

Externe Links

Zeitschrift / Serie

Microprocessors and Microsystems

Band

29(2-3)

Seiten / Artikelnummer

63 - 73

Verlag

Elsevier

Thema

Field-programmable gate arrays; Reconfigurable computing; Hybrid reconfigurable processors; Co-simulation

Organisationseinheit

03429 - Thiele, Lothar (emeritus) / Thiele, Lothar (emeritus)

Anmerkungen

Received 20 October 2003, Revised 08 March 2004, Accepted 01 June 2004, Available online 20 July 2004.

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yes

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