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Date
2007Type
- Conference Paper
ETH Bibliography
yes
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Abstract
The design of nano structures is considered a challenge for design methods, which have to cope with much more elements than traditional VLSI. Moreover, such elements will be unreliable due to unavoidable physical quantum effects. The inevitable fault tolerance leads to an additional increase of the design space. An extremely high number of nano-devices can be used for various redundancy schemes and many combinations thereof, thus promising an efficient solution to the reliability problem of nano devices. This paper proposes a heuristic design method based on a specific type of genetic algorithms. It has been adapted to the design of fault-tolerant nano systems with respect to the representation of systems as well as the fitness function and the underlying fault model. Show more
Publication status
publishedExternal links
Book title
Proceedings of the 7th IEEE International Conference on NanotechnologyPages / Article No.
Publisher
IEEEEvent
Subject
Nano; Reliability; System design; Fault-tolerance; Genetic algorithmsOrganisational unit
03292 - Kröger, Wolfgang
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ETH Bibliography
yes
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