- Conference Paper
To this day, polyhedral optimizing compilers use either extremely rigid (but accurate) cost models, one-size-fits-all general-purpose heuristics, or auto-tuning strategies to traverse and evaluate large optimization spaces. In this paper, we introduce an adaptive and automatic scheduler that permits to generate novel loop transformation sequences (or recipes) capable of delivering strong performance for a variety of different architectures without relying on auto-tuning, nor on pre-determined transformation strategies. We evaluate our approach using the Polybench/C benchmark suite against two modern state-of-the-art optimizers on three different architectures: An AMD ThreadRipper, an Intel Xeon Phi, and an Intel Xeon Platinum. Our results provide evidence that a set of high-level objectives backed up by an automatic adaptive scheduler (i.e., not hard-wired) is capable of achieving competitive performance, while only resorting to evaluating a handful of tuned variants. Show more
Book titlePACT '20: Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques
Pages / Article No.
Subjectaffine transformations; polyhedral model; loop optimization
168016 - Automatized compilation of sequential software to a diverse set of hardware accelerators (SNF)
NotesDue to the Coronavirus (COVID-19) the conference was conducted virtually.
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