Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology
dc.contributor.author
Di Mauro, Alfio
dc.contributor.author
Zaruba, Florian
dc.contributor.author
Schuiki, Fabian
dc.contributor.author
Mach, Stefan
dc.contributor.author
Benini, Luca
dc.date.accessioned
2021-11-18T10:06:12Z
dc.date.available
2021-11-13T07:54:54Z
dc.date.available
2021-11-18T10:06:12Z
dc.date.issued
2020
dc.identifier.isbn
978-1-7281-3320-1
en_US
dc.identifier.other
10.1109/ISCAS45731.2020.9180961
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/515021
dc.description.abstract
To provide high computational capabilities, and, at the same time, minimize the power consumption, modern Systems-on-Chip (SoCs) target very low energy consumption per operation as a primary objective. This goal has been achieved in recent years by adopting simple, yet very effective strategies like aggressive voltage and frequency scaling. However, the process variations that affects highly scaled technology nodes represents a severe limitation to the application of such techniques [2]; forcing digital designers to account for significant supply voltage margins to guarantee sign-off frequencies [1].
en_US
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.title
Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology
en_US
dc.type
Other Conference Item
dc.date.published
2020-09-28
ethz.book.title
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
en_US
ethz.pages.start
9180961
en_US
ethz.size
1 p.
en_US
ethz.event
2020 IEEE International Symposium on Circuits and Systems (ISCAS 2020) (virtual)
en_US
ethz.event.location
Seville, Spain
en_US
ethz.event.date
October 10-21, 2020
en_US
ethz.notes
Due to the Coronavirus (COVID-19) the conference was conducted virtually.
en_US
ethz.identifier.wos
ethz.publication.place
Piscataway, NJ
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
ethz.date.deposited
2021-11-13T07:56:53Z
ethz.source
WOS
ethz.eth
yes
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2021-11-18T10:06:18Z
ethz.rosetta.lastUpdated
2022-03-29T16:03:15Z
ethz.rosetta.versionExported
true
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