A 2.3GHz Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators achieving 78.1% Efficiency in 22nm FDSOI CMOS
dc.contributor.author
Novello, Alessandro
dc.contributor.author
Atzeni, Gabriele
dc.contributor.author
Cristiano, Giorgio
dc.contributor.author
Coustans, Mathieu
dc.contributor.author
Jang, Taekwang
dc.date.accessioned
2022-03-14T15:29:08Z
dc.date.available
2021-11-15T09:15:34Z
dc.date.available
2021-11-15T09:29:59Z
dc.date.available
2021-12-09T18:39:54Z
dc.date.available
2022-03-14T15:29:08Z
dc.date.issued
2021
dc.identifier.issn
2573-9603
dc.identifier.other
10.1109/lssc.2021.3126736
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/515190
dc.description.abstract
This letter introduces a fully integrated DC-DC converter based on electromagnetically coupled class-D LC oscillators featuring on-chip stacked 8-shaped transformers in a 22nm FDSOI CMOS process. The GHz-range resonant frequency of the proposed converter enables high integration of the passive components, achieving up to 3.2W/mm2 power density. The on-chip 8-shaped stacked transformers reach 16.9 quality factor and 0.91 coupling coefficient, demonstrating 78.1% converter efficiency. Furthermore, the twisted nature of the 8-shaped transformers introduces a magnetic field cancellation mechanism that minimizes the parasitic coupling between the transformers, saving 25% area in one single converter unit and 47% in the converter array, with respect a spiral transformer implementation. In addition, the field intensity is reduced by 27dB outside of the transformer borders compared with a spiral implementation, which helps to mitigate issues such as parasitic magnetic coupling with neighbouring circuits and EMI.
en_US
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.title
A 2.3GHz Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators achieving 78.1% Efficiency in 22nm FDSOI CMOS
en_US
dc.type
Journal Article
dc.date.published
2021-11-15
ethz.journal.title
IEEE Solid-State Circuits Letters
ethz.journal.volume
4
en_US
ethz.pages.start
218
en_US
ethz.pages.end
221
en_US
ethz.identifier.wos
ethz.publication.place
New York, NY
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::09647 - Jang, Taekwang / Jang, Taekwang
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::09647 - Jang, Taekwang / Jang, Taekwang
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::09647 - Jang, Taekwang / Jang, Taekwang
en_US
ethz.date.deposited
2021-11-15T09:15:40Z
ethz.source
FORM
ethz.eth
yes
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2021-12-09T18:40:00Z
ethz.rosetta.lastUpdated
2022-03-29T20:37:15Z
ethz.rosetta.versionExported
true
ethz.COinS
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Journal Article [130568]