Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml
Abstract
In this paper, we investigate how field programmable gate arrays can serve as hardware accelerators for real-time semantic segmentation tasks relevant for autonomous driving. Considering compressed versions of the ENet convolutional neural network architecture, we demonstrate a fully-on-chip deployment with a latency of 4.9 ms per image, using less than 30% of the available resources on a Xilinx ZCU102 evaluation board. The latency is reduced to 3 ms per image when increasing the batch size to ten, corresponding to the use case where the autonomous vehicle receives inputs from multiple cameras simultaneously. We show, through aggressive filter reduction and heterogeneous quantization-aware training, and an optimized implementation of convolutional layers, that the power consumption and resource utilization can be significantly reduced while maintaining accuracy on the Cityscapes dataset. Show more
Permanent link
https://doi.org/10.3929/ethz-b-000582216Publication status
publishedExternal links
Journal / series
Machine Learning: Science and TechnologyVolume
Pages / Article No.
Publisher
IOP PublishingSubject
FPGA; computer vision; deep learning; hls4ml; machine learning; autonomous vehicles; semantic segmentationOrganisational unit
03593 - Dissertori, Günther / Dissertori, Günther
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