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dc.contributor.author
Huang, Kai
dc.contributor.author
Gruenert, David
dc.contributor.author
Thiele, Lothar
dc.contributor.editor
IEEE
dc.date.accessioned
2017-06-08T17:21:22Z
dc.date.available
2017-06-08T17:21:22Z
dc.date.issued
2007
dc.identifier.isbn
978-1-4244-1026-2
dc.identifier.isbn
978-1-4244-1027-9
dc.identifier.issn
1063-6862
dc.identifier.other
10.1109/ASAP.2007.4429955
dc.identifier.uri
http://hdl.handle.net/20.500.11850/6338
dc.language.iso
en
dc.publisher
IEEE
dc.title
Windowed FIFOs for FPGA-based multiprocessor systems
dc.type
Conference Paper
ethz.book.title
IEEE International Conference on Application-Specific Systems, Architectures and Processors
ethz.journal.title
International Conference on Application Specific Array Processors
ethz.pages.start
36
ethz.pages.end
41
ethz.event
18th IEEE International Conference on Application-Specific Systems, Architectures and Processors
ethz.event.date
July 8-11, 2007
ethz.notes
Current Version Published: 2008-01-14..
ethz.identifier.nebis
000957304
ethz.publication.place
New York
ethz.publication.status
published
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.::03429 - Thiele, Lothar / Thiele, Lothar
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.::03429 - Thiele, Lothar / Thiele, Lothar
ethz.date.deposited
2017-06-08T17:21:38Z
ethz.source
ECIT
ethz.identifier.importid
imp59364b9f6fb6f96291
ethz.ecitpid
pub:16731
ethz.eth
yes
ethz.availability
Metadata only
ethz.rosetta.installDate
2017-07-12T18:32:34Z
ethz.rosetta.lastUpdated
2018-10-01T04:45:50Z
ethz.rosetta.versionExported
true
ethz.COinS
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