Nanosecond Solid-State Pulse Generator

Abstract

WBG semiconductor devices such as SiC MOSFETs and GaN HEMTs are increasingly used in novel pulse modulator designs. Due to their fast switching speed, short pulse widths in the range of a few nanoseconds come into reach of modern pulse generator systems. Such nanosecond pulses are advantageous for example in injection/extraction systems of particle accelerators, medical lasers or plasma generation systems. In this thesis, the basic limitations of very fast solid-state pulse modulators based on WBG devices are investigated with respect to the minimum pulse width and the minimum achievable rise/fall times. The target application is the control of stripline kicker magnets, which are increasingly used in modern synchrotron facilities. The goal of the project is to build a prototype system to validate the theoretical and analytical considerations. In the first part of the thesis, the switching speed limitations of the switching cell, which is the basic building block of a modular pulse generator system, are investigated. Apart from the semiconductor chip, it is mainly the package and the gate driver circuit that determine the achievable rise/fall times. Therefore, different switching cell designs based on SiC MOSFETs and GaN HEMTs are designed and their switching speed is compared. In this context, a GaN-based gate drive circuit is developed and extended with an additional boost functionality to maximise the switching speed of the switching cell. Furthermore, low-inductive packaging concepts based on the integration of the semiconductor die into a PCB are investigated. The achievable parasitics of the low-inductive packages are identified and the switching speed is compared with conventional semiconductor packages. In the second part, suitable topologies for the implementation of the ultrafast pulse modulator are identified based on a literature review of existing concepts that have been built and tested in the past. Based on this literature review, the SSMG and the LTD are investigated in more detail as the most promising topologies. Parasitic models of the two topologies are derived and the topologies are simulated using numerical circuit simulations to compare their switching speed. The influence of tolerances in the characteristics of the WBG devices on the switching transients of the output pulse is also investigated. As a result of the topology comparison, a prototype system with a nominal voltage amplitude of 4 kV is built based on the LTD topology. The prototype uses 1.2 kV SiC MOSFETs and consists of five stages connected in series, each with three switching cells connected in parallel. Finally, pulse measurements of the prototype system are performed and its switching speed is evaluated.