Planning railway and metro systems includes the critical step of finding a schedule for the trains. Although buffer times and running supplements are added to the schedule to make operations resilient to minor disturbances, they do not protect against all possible events that may lead to conflicts during everyday operations. Thus, real-time train rescheduling models are needed to restore feasibility using actions such as retiming, reordering, ...

We demonstrate a digital-to-optical-to-digital link operating at 10 Gb/s with 2.4 pJ/b below 10-9 BER enabled by zero-change CMOS macros. All necessary electronic-photonic circuits are contained within 0.015 mm2 of silicon area.

Transistor (DHBT) emitter fin architecture with a record fMAX = 1.2 THz, a simultaneous fT = 475 GHz and BVCEO = 5.4 V. The resulting BVCEO × fMAX = 6.48 THz-V is unparalleled in semiconductor technology. The performance arises because the process allows: i) an optimal choice of baseemitter access distance down to 10 nm, ii) the use of thicker base contact metals, and iii) the minimization of parasitic capacitances and resistances via ...