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Towards cube-sized compute nodes: Advanced packaging concepts enabling extreme 3D integration

Brunschwiler, Thomas; Schlottig, Gerd; Sridhar, Arvind; et al. (2017)

2017 IEEE International Electron Devices Meeting (IEDM)

Conference Paper
Analysis and Comparative Evaluation of Stacked-Transistor Half-Bridge Topologies Implemented with 14 nm Bulk CMOS Technology

Bezerra, Pedro A.M.; Khaddam-Aljameh, Riduan; Krismer, Florian; et al. (2017)

2017 IEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL)

Conference Paper