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dc.contributor.author
Oetiker, Stephan
dc.contributor.author
Gürkaynak, Frank Kagan
dc.contributor.author
Villiger, Thomas
dc.contributor.author
Kaeslin, Hubert
dc.contributor.author
Felber, Norbert
dc.contributor.author
Fichtner, Wolfgang
dc.date.accessioned
2017-06-11T13:07:11Z
dc.date.available
2017-06-11T13:07:11Z
dc.date.issued
2003
dc.identifier.uri
http://hdl.handle.net/20.500.11850/90936
dc.language.iso
en
dc.publisher
THIRD ACiD-WG Workshop OF THE EUROPEAN COMMISSION'S FIFTH FRAMEWORK PROGRAMME
dc.title
Design flow for a 3-million transistor GALS test chip
dc.type
Other Conference Item
ethz.book.title
Handouts of the Third ACiD-WG Workshop
ethz.size
3 p.
ethz.event
Third ACiD-WG Workshop of the European Commision's fifth framework programme
ethz.event.date
January 27-28, 2003
ethz.notes
.
ethz.publication.place
Forth
ethz.publication.status
published
ethz.leitzahl
03228 - Fichtner, Wolfgang
ethz.leitzahl.certified
03228 - Fichtner, Wolfgang
ethz.date.deposited
2017-06-11T13:07:52Z
ethz.source
ECIT
ethz.identifier.importid
imp5936526ac6e6161587
ethz.ecitpid
pub:143115
ethz.eth
yes
ethz.availability
Metadata only
ethz.rosetta.installDate
2017-07-31T15:11:59Z
ethz.rosetta.lastUpdated
2019-02-02T06:46:03Z
ethz.rosetta.versionExported
true
ethz.COinS
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