Application-relevant Measurement of the Input Capacitance of SiC Power MOSFETs
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Date
2025
Publication Type
Conference Paper
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yes
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Abstract
This paper presents a deep dive into the application-relevant input capacitance of SiC power MOSFETs based on a ramp-C-V characterization setup and numerical device simulations. The results point to practical challenges of capacitance-voltage characterization of SiC power MOSFETs at fast voltage ramp-rates, due to the internal gate resistance. Using numerical device simulations, it is to evaluate how SiC-oxide interface defects, modeled by a density of interface states in the band-gap and a capture cross section, can potentially affect the dynamic C-V response. Furthermore, the results indicate that the accuracy of the state-of-the-art Spice-based device modeling of SiC power MOSFETs should be evaluated at different switching speeds.
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Publication status
published
Editor
Book title
2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD)
Journal / series
Volume
Pages / Article No.
561 - 564
Publisher
IEEE
Event
37th International Symposium on Power Semiconductor Devices and ICs (ISPSD 2025)
Edition / version
Methods
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Date collected
Date created
Subject
Ramp C-V characterization; Input capacitance; SiC power MOSFET; Fast and slow switching
Organisational unit
09480 - Grossner, Ulrike / Grossner, Ulrike
Notes
Funding
209501 - Advanced Multi-objective Optimization of Wide-band Gap-based Power Electronic Systems (SNF)