Fully programmable bias current generator with 24 bit resolution per bias
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2006
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Conference Paper
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Abstract
This paper describes an on-chip programmable bias current generator, intended for mixed signal chips requiring a wide ranging set of currents. The individual generators share a master current reference. A serial digital interface to the chip controls the biases by bits loaded into a 24-bit shift register. These bits control the steering of current from a current splitter. The summed current splitter output is actively mirrored to a broadcasted bias voltage. Measurements from an implementation in 0.35/spl mu/ 4M-2P CMOS show a total range of bias current of over 6 decades (>120 dB) ranging from a few times the off-current up to the master reference current. For currents larger than the minimum, the generator has resolution spanning nearly its full 24 bit range (144dB), e.g. for a master current of 10 /spl mu/A, any bias current can be varied by as little as 0.5 pA with the caveat that the code is not guaranteed monotonic. Each bias occupies an area of 0.026 mm/sup 2/, which is about 65% of the bonding pad that it replaces. Measured variation in generated currents is <10% in strong inversion and about 20-30% in weak inversion.
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2006 IEEE International Symposium on Circuits and Systems (ISCAS)
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2849 - 2852
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IEEE
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IEEE International Symposium on Circuits and Systems (ISCAS 2006)
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Software
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03453 - Douglas, Rodney J. (emeritus)