Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion using IDW
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Autor(in)
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Datum
2016-11Typ
- Journal Article
ETH Bibliographie
yes
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Publikationsstatus
publishedExterne Links
Zeitschrift / Serie
IEEE Transactions on Circuits and Systems for Video TechnologyBand
Seiten / Artikelnummer
Verlag
IEEEThema
Video processing; Real-time; Sterosopic 3D (S3D); Multiview synthesis (MVS); Image domain warping (IDW); FPGA; ASIC; VLSIOrganisationseinheit
03996 - Benini, Luca / Benini, Luca
Anmerkungen
Published online 19 November 2015.ETH Bibliographie
yes
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