Open access
Datum
1999-11Typ
- Report
ETH Bibliographie
yes
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Abstract
The growing gap between processor speed and memory access time becomes more and more a performance limiting factor in modern computing systems. Therefore, DRAM manufactures try to improve memory throughput by developing new memory interfaces around basically unchanged memory cores. This report focuses on embedded systems, i.e., systems which utilize less cache space and fewer memory hierarchy levels than ordinary PC or workstation systems due to costs, area, and power dissipation restrictions. Therefore, embedded systems particularly depend on the performance of the underlying main memory system. Hence, two recent DRAM architectures, widely-used SDRAMs and the next generation memory Direct RDRAM, are investigated in this report. Performance gains are revealed that can be achieved by exploiting features of recent memory interfaces with simple enhancements of current embedded memory controllers. Different approaches for memory access schemes are investigated by simulation of the DRAM architectures and the memory controller together with an out-of order issue, superscalar CPU model running various applications. The simulations lead to the following results: using RDRAMs instead of SDRAMs improves the performance of the system by up to 21%. However, in many cases this difference in speed can be compensated by an optimized memory controller design that exploits the pipeline and bank structure of recent DRAMs. An analysis of address traces shows that the described improvements better consider the locality characteristics of the applications because expensive (in terms of latency) row misses in the current memory bank can be shifted to cheaper accesses to other memory banks. Mehr anzeigen
Persistenter Link
https://doi.org/10.3929/ethz-a-004287049Publikationsstatus
publishedZeitschrift / Serie
TIK ReportBand
Verlag
ETH Zurich, Computer Engineering and Networks LaboratoryOrganisationseinheit
02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.
ETH Bibliographie
yes
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