A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)
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Date
2018-02Type
- Journal Article
Publication status
publishedExternal links
Journal / series
IEEE Transactions on Biomedical Circuits and SystemsVolume
Pages / Article No.
Publisher
IEEESubject
Asynchronous; circuits and systems; neuromorphic computing; routing architecturesOrganisational unit
02533 - Institut für Neuroinformatik / Institute of Neuroinformatics
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