NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs
dc.contributor.author
Meloni, Paolo
dc.contributor.author
Capotondi, Alessandro
dc.contributor.author
Deriu, Gianfranco
dc.contributor.author
Brian, Michele
dc.contributor.author
Conti, Francesco
dc.contributor.author
Rossi, Davide
dc.contributor.author
Raffo, Luigi
dc.contributor.author
Benini, Luca
dc.date.accessioned
2019-01-14T07:02:32Z
dc.date.available
2018-12-28T03:46:32Z
dc.date.available
2019-01-14T07:02:32Z
dc.date.issued
2018-12
dc.identifier.issn
1936-7406
dc.identifier.issn
1936-7414
dc.identifier.other
10.1145/3284357
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/313306
dc.language.iso
en
en_US
dc.publisher
Association for Computing Machinery
dc.subject
FPGAs
en_US
dc.subject
convolutional neural networks
en_US
dc.subject
HW accelerator
en_US
dc.subject
image classification
en_US
dc.title
NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs
en_US
dc.type
Journal Article
dc.date.published
2018-12-22
ethz.journal.title
ACM Transactions on Reconfigurable Technology and Systems
ethz.journal.volume
S11
en_US
ethz.journal.issue
3
en_US
ethz.journal.abbreviated
ACM Trans. Reconig. Technol. Syst.
ethz.pages.start
18
en_US
ethz.size
24 p.
en_US
ethz.event.location
ethz.notes
Special Issue on Deep learning on FPGA
en_US
ethz.identifier.wos
ethz.identifier.scopus
ethz.publication.place
New York, NY
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::03996 - Benini, Luca / Benini, Luca
ethz.date.deposited
2018-12-28T03:46:35Z
ethz.source
SCOPUS
ethz.eth
yes
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2019-01-14T07:03:00Z
ethz.rosetta.lastUpdated
2024-02-02T06:56:52Z
ethz.rosetta.versionExported
true
ethz.COinS
ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.atitle=NEURAghe:%20Exploiting%20CPU-FPGA%20synergies%20for%20efficient%20and%20flexible%20CNN%20inference%20acceleration%20on%20zynQ%20SoCs&rft.jtitle=ACM%20Transactions%20on%20Reconfigurable%20Technology%20and%20Systems&rft.date=2018-12&rft.volume=S11&rft.issue=3&rft.spage=18&rft.issn=1936-7406&1936-7414&rft.au=Meloni,%20Paolo&Capotondi,%20Alessandro&Deriu,%20Gianfranco&Brian,%20Michele&Conti,%20Francesco&rft.genre=article&rft_id=info:doi/10.1145/3284357&
Files in this item
Files | Size | Format | Open in viewer |
---|---|---|---|
There are no files associated with this item. |
Publication type
-
Journal Article [129340]