A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters
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Date
2014Type
- Conference Paper
ETH Bibliography
yes
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Abstract
Modern designs for embedded many-core systems increasingly include application-specific units to accelerate key computational kernels with orders-of-magnitude higher execution speed and energy efficiency compared to software counterparts. A promising architectural template is based on heterogeneous clusters, where simple RISC cores and specialized HW units (HWPU) communicate in a tightly-coupled manner via L1 shared memory. Efficiently integrating processors and a high number of HW Processing Units (HWPUs) in such an system poses two main challenges, namely, architectural scalability and programmability. In this paper we describe an optimized Data Pump (DP) which connects several accelerators to a restricted set of communication ports, and acts as a virtualization layer for programming, exposing FIFO queues to offload “HW tasks” to them through a set of lightweight APIs. In this work, we aim at optimizing both these mechanisms, for respectively reducing modules area and making programming sequence easier and lighter. Show more
Publication status
publishedExternal links
Book title
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)Pages / Article No.
Publisher
IEEEEvent
Organisational unit
03996 - Benini, Luca / Benini, Luca
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ETH Bibliography
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