A modeling language for mixed circuit and semiconductor device simulation
dc.contributor.author
Litsios, James
dc.contributor.supervisor
Fichtner, Wolfgang
dc.contributor.supervisor
Thiele, Lothar
dc.date.accessioned
2017-06-13T01:53:53Z
dc.date.available
2017-06-13T01:53:53Z
dc.date.issued
1996
dc.identifier.uri
http://hdl.handle.net/20.500.11850/142606
dc.identifier.doi
10.3929/ethz-a-001630418
dc.format
application/pdf
dc.language.iso
en
dc.publisher
ETH Zürich
dc.rights.uri
http://rightsstatements.org/page/InC-NC/1.0/
dc.subject
SPEZIFIKATIONSSPRACHEN + BESCHREIBUNGSSPRACHEN (HARDWARE)
dc.subject
HALBLEITERBAUELEMENTE + ELEKTRONISCHE BAUELEMENTE (ELEKTRONIK)
dc.subject
TRANSIENTENANALYSE (ELEKTROTECHNIK)
dc.subject
SPECIFICATION LANGUAGES + DESCRIPTION LANGUAGES (HARDWARE)
dc.subject
SEMICONDUCTOR COMPONENTS + ELECTRONIC COMPONENTS (ELECTRONICS)
dc.subject
TRANSIENT ANALYSIS (ELECTRICAL ENGINEERING)
dc.title
A modeling language for mixed circuit and semiconductor device simulation
dc.type
Doctoral Thesis
dc.rights.license
In Copyright - Non-Commercial Use Permitted
ethz.size
IX, 139 S.
ethz.code.ddc
DDC - DDC::6 - Technology, medicine and applied sciences::621.3 - Electric engineering
ethz.code.ddc
DDC - DDC::0 - Computer science, information & general works::004 - Data processing, computer science
ethz.notes
Diss. Techn. Wiss. ETH Zürich, Nr. 11412, 1996. Ref.: W. Fichtner ; Korref.: L. Thiele.
ethz.identifier.diss
11412
ethz.identifier.nebis
001630418
ethz.publication.place
Zürich
ethz.publication.status
published
ethz.date.deposited
2017-06-13T01:54:33Z
ethz.source
ECOL
ethz.identifier.importid
imp59366a055a82774739
ethz.ecolpid
eth:40282
ethz.eth
yes
ethz.availability
Closed access
ethz.rosetta.installDate
2017-07-19T03:17:41Z
ethz.rosetta.lastUpdated
2020-02-14T23:23:57Z
ethz.rosetta.versionExported
true
ethz.COinS
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Doctoral Thesis [29811]