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Date
2008-02Type
- Conference Paper
ETH Bibliography
yes
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Abstract
This paper presents the implementation of the 1.2 mm 2 HSDPA turbo decoder ASIC in 0.13 mum CMOS achieves a measured maximum frequency of 246 MHz, which translates to a maximum throughput of 20.2 Mb/s at 5.5 iterations. The peak throughput of 10.8 Mb/s required for HSDPA is achieved at 58 mW and an energy efficiency of 0.7 nJ/b/iter. The number of iterations versus input SNR, as determined by the implemented stopping criterion, and corresponding power measurements. Show more
Publication status
publishedExternal links
Book title
2008 IEEE International Solid-State Circuits ConferenceJournal / series
Digest of Technical Papers / IEEE International Solid State Circuits ConferenceVolume
Pages / Article No.
Publisher
IEEEEvent
Organisational unit
03380 - Huang, Qiuting (emeritus) / Huang, Qiuting (emeritus)
03228 - Fichtner, Wolfgang
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ETH Bibliography
yes
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