RISC-V for Real-time MCUs - Software Optimization and Microarchitectural Gap Analysis
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Date
2021-02Type
- Conference Paper
Abstract
Processors using the RISC-VISA are finding increasing real use in IoT and embedded systems in the MCU segment. However, many real-life use cases in this segment have realtime constraints. In this paper we analyze the current state of real-time support for RISC-V with respect to the ISA, available hardware and software stack focusing on the RV32IMC subset of the ISA. As a reference point, we use the CV32E40P, an open-source industrially supported RV32IMFC core and FreeRTOS, a popular open-source real-time operating system, to do a baseline characterization. We perform a series of software optimizations on the vanilla RISC-V FreeRTOS port where we also explore and make use of ISA and micro-architectural features, improving the context switch time by 25% and the interrupt latency by 33% in the average and 20% in the worst-case run on a CV32E40P when evaluated on a power control unit firmware and synthetic benchmarks. This improved version serves then in a comparison against the ARM Cortex-M series, which in turn allows us to highlight gaps and challenges to be tackled in the RISC-VISA as well as in the hardware/software ecosystem to achieve competitive maturity. Show more
Publication status
publishedExternal links
Book title
Proceedings of the 2021 Design, Automation & Test in Europe (DATE 2021)Pages / Article No.
Publisher
IEEEEvent
Subject
RISC-V; FreeRTOS; Real-time; Open-sourceOrganisational unit
03996 - Benini, Luca / Benini, Luca
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