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PULP: A Parallel Ultra Low Power platform for next generation IoT Applications
(2016)2015 IEEE Hot Chips 27 Symposium (HCS)Conference Paper -
Runtime Support for Multiple Offload-Based Programming Models on Embedded Manycore Accelerators
(2015)Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many CoresConference Paper -
Improving the programmability of STHORM-based heterogeneous systems with offload-enabled OpenMP
(2013)Proceedings of the First International Workshop on Many-core Embedded SystemsConference Paper -
Mixed-data-model heterogeneous compilation and OpenMP offloading
(2020)CC 2020: Proceedings of the 29th International Conference on Compiler ConstructionConference Paper -
HERO: an Open-Source Research Platform for HW/SW Exploration of Heterogeneous Manycore Systems
(2018)Heterogeneous systems on chip (HeSoCs) co-integrate a high-performance multicore host processor with programmable manycore accelerators (PMCAs) to combine “standard platform” software support (e.g. the Linux OS) with energy-efficient, domain-specific, highly parallel processing capabilities. In this work, we present HERO, a HeSoC platform that tackles this challenge in a novel way HERO’s host processor is an industry-standard ARM ...Conference Paper -
HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA
(2017)Proceedings of Computer Architecture Research with RISC-V Workshop (CARRV' 17)Heterogeneous embedded systems on chip (HESoCs) co-integrate a standard host processor with programmable manycore accelerators (PMCAs) to combine general-purpose computing with domain-specific, efficient processing capabilities. While leading companies successfully advance their HESoC products, research lags behind due to the challenges of building a prototyping platform that unites an industry-standard host processor with an open ...Conference Paper