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CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
(2024)2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)DRAM chips are increasingly more vulnerable to read-disturbance phenomena (e.g., RowHammer and RowPress), where repeatedly accessing DRAM rows causes bitflips in nearby rows due to DRAM density scaling. Under low RowHammer thresholds, existing RowHammer mitigations either incur high area overheads or degrade performance significantly. We propose a new RowHammer mitigation mechanism, CoMeT, that prevents RowHammer bitflips with low area, ...Conference Paper -
Deferred Continuous Batching in Resource-Efficient Large Language Model Serving
(2024)EuroMLSys '24: Proceedings of the 4th Workshop on Machine Learning and SystemsDespite that prior work of batched inference and parameter-efficient fine-tuning techniques have reduced the resource requirements of large language models (LLMs), challenges remain in resource-constrained environments such as on-premise infrastructures to serve workload that is composed of both inference and fine-tuning jobs. Prior solutions must either pause existing jobs which causes service interruptions, or queue new jobs which results ...Conference Paper -
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
(2024)2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the potential to significantly reduce or eliminate costly data movement between processing elements and main memory. A common approach for PuD architectures is to make use of bulk bitwise computation (e.g., AND, OR, NOT). Prior works experimentally demonstrate ...Conference Paper -
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
(2024)2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)Read disturbance in modern DRAM chips is a widespread phenomenon and is reliably used for breaking memory isolation, a fundamental building block for building robust systems. RowHammer and RowPress are two examples of read disturbance in DRAM where repeatedly accessing (hammering) or keeping active (pressing) a memory location induces bitflips in other memory locations. Unfortunately, shrinking technology node size exacerbates read ...Conference Paper -
Suppressing Spurious Dynamism of Dataflow Circuits via Latency and Occupancy Balancing
(2024)FPGA '24: Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate ArraysDataflow circuits produced via high-level synthesis (HLS) adapt their schedule at runtime to unpredictable data and control outcomes, thus promising superior performance to standard HLS solutions. However, their distributed handshake mechanism is extremely resource-expensive-there is a clear benefit in simplifying or removing it whenever it is unneeded for correctness and performance. Yet, even in such situations, transient and spurious ...Conference Paper -
Survival of the Fastest: Enabling More Out-of-Order Execution in Dataflow Circuits
(2024)FPGA '24: Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate ArraysDynamically scheduled HLS, through dataflow circuit generation, has proven successful at exploiting operation-level parallelism in several important situations where statically scheduled HLS fails. Yet, although existing dataflow circuits support out-of-order execution of different operations, they strictly confine successive instances of the same operation to execute sequentially in program order, which drastically affects the circuit's ...Conference Paper -
UBFuzz: Finding Bugs in Sanitizer Implementations
(2024)ASPLOS '24: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1In this paper, we propose a testing framework for validating sanitizer implementations in compilers. Our core components are (1) a program generator specifically designed for producing programs containing undefined behavior (UB), and (2) a novel test oracle for sanitizer testing. The program generator employs Shadow Statement Insertion, a general and effective approach for introducing UB into a valid seed program. The generated UB programs ...Conference Paper -
Search for a muon EDM at the Paul Scherrer Institute
(2024)PoS: Proceedings of Science ~ Muon4Future WorkshopElectric dipole moments (EDM) of non-degenerate systems with angular momentum violate parity and time symmetry, and by the virtue of the CPT-theorem also the combined symmetry of charge and parity (CP). Although CP violation (CPV) is an established ingredient of the weak sector of the standard model of particle physics (SM), its contribution to an EDM of a fundamental particle is too small to be measured any time soon. Therefore, any ...Conference Paper -
The Importance of Colour in Asplund's Work (1918-1928)
(2024)Essays from the 2nd International Symposium on the Architecture of Erik Gunnar AsplundConference Paper -
From "Beauty and Festivity" to "Accept the Reality"
(2024)Essays from the 2nd International Symposium on the Architecture of Erik Gunnar AsplundConference Paper